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clk: samsung: Fix kernel-doc comments

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Fix some issues found in kernel-doc comments in Samsung CCF framework.
It makes scripts/kernel-doc happy, which can be checked with:

    $ find drivers/clk/samsung/ -name '*.[ch]' -exec \
      scripts/kernel-doc -v -none {} \;

Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Fixes: ddeac8d968 ("clk: samsung: add infrastructure to register cpu clocks")
Fixes: 721c42a351 ("clk: samsung: add common clock framework helper functions for Samsung platforms")
Fixes: 3ff6e0d8d6 ("clk: samsung: Add support to register rate_table for samsung plls")
Reviewed-by: Randy Dunlap <rdunlap@infradead.org>
Tested-by: Randy Dunlap <rdunlap@infradead.org>
Link: https://lore.kernel.org/r/20231109190925.2066-1-semen.protsenko@linaro.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
This commit is contained in:
Sam Protsenko 2023-11-09 13:09:24 -06:00 committed by Krzysztof Kozlowski
parent b85ea95d08
commit d1d53909bb
2 changed files with 7 additions and 4 deletions
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2
drivers/clk/samsung/clk-cpu.h
View File

@ -11,7 +11,7 @@
#include "clk.h"
/**
* struct exynos_cpuclk_data: config data to setup cpu clocks.
* struct exynos_cpuclk_cfg_data: config data to setup cpu clocks.
* @prate: frequency of the primary parent clock (in KHz).
* @div0: value to be programmed in the div_cpu0 register.
* @div1: value to be programmed in the div_cpu1 register.

9
drivers/clk/samsung/clk.h
View File

@ -55,7 +55,7 @@ struct samsung_clock_alias {
* @name: name of this fixed-rate clock.
* @parent_name: optional parent clock name.
* @flags: optional fixed-rate clock flags.
* @fixed-rate: fixed clock rate of this clock.
* @fixed_rate: fixed clock rate of this clock.
*/
struct samsung_fixed_rate_clock {
unsigned int id;
@ -74,7 +74,7 @@ struct samsung_fixed_rate_clock {
.fixed_rate = frate, \
}
/*
/**
* struct samsung_fixed_factor_clock: information about fixed-factor clock
* @id: platform specific id of the clock.
* @name: name of this fixed-factor clock.
@ -146,14 +146,16 @@ struct samsung_mux_clock {
__MUX(_id, cname, pnames, o, s, w, f, mf)
/**
* @id: platform specific id of the clock.
* struct samsung_div_clock: information about div clock
* @id: platform specific id of the clock.
* @name: name of this div clock.
* @parent_name: name of the parent clock.
* @flags: optional flags for basic clock.
* @offset: offset of the register for configuring the div.
* @shift: starting bit location of the div control bit-field in @reg.
* @width: width of the bitfield.
* @div_flags: flags for div-type clock.
* @table: array of divider/value pairs ending with a div set to 0.
*/
struct samsung_div_clock {
unsigned int id;
@ -244,6 +246,7 @@ struct samsung_clk_reg_dump {
* @con_offset: offset of the register for configuring the PLL.
* @lock_offset: offset of the register for locking the PLL.
* @type: Type of PLL to be registered.
* @rate_table: array of PLL settings for possible PLL rates.
*/
struct samsung_pll_clock {
unsigned int id;