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USB: serial: f81534: fix tx error on some baud rate
The F81532/534 had 4 clocksource 1.846/18.46/14.77/24MHz and baud rates can be up to 1.5Mbits with 24MHz. But on some baud rate (384~500kps), the TX side will send the data frame too close to treat frame error on RX side. This patch will force all TX data frame with delay 1bit gap. Signed-off-by: Ji-Ze Hong (Peter Hong) <hpeter+linux_kernel@gmail.com> Signed-off-by: Johan Hovold <johan@kernel.org>
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@ -131,6 +131,7 @@
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#define F81534_CLK_24_MHZ BIT(2)
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#define F81534_CLK_24_MHZ BIT(2)
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#define F81534_CLK_14_77_MHZ (BIT(1) | BIT(2))
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#define F81534_CLK_14_77_MHZ (BIT(1) | BIT(2))
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#define F81534_CLK_MASK GENMASK(2, 1)
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#define F81534_CLK_MASK GENMASK(2, 1)
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#define F81534_CLK_TX_DELAY_1BIT BIT(3)
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#define F81534_CLK_RS485_MODE BIT(4)
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#define F81534_CLK_RS485_MODE BIT(4)
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#define F81534_CLK_RS485_INVERT BIT(5)
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#define F81534_CLK_RS485_INVERT BIT(5)
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@ -1386,7 +1387,11 @@ static int f81534_port_probe(struct usb_serial_port *port)
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if (!port_priv)
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if (!port_priv)
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return -ENOMEM;
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return -ENOMEM;
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port_priv->shadow_clk = F81534_UART_EN;
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/*
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* We'll make tx frame error when baud rate from 384~500kps. So we'll
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* delay all tx data frame with 1bit.
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*/
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port_priv->shadow_clk = F81534_UART_EN | F81534_CLK_TX_DELAY_1BIT;
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spin_lock_init(&port_priv->msr_lock);
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spin_lock_init(&port_priv->msr_lock);
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mutex_init(&port_priv->mcr_mutex);
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mutex_init(&port_priv->mcr_mutex);
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mutex_init(&port_priv->lcr_mutex);
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mutex_init(&port_priv->lcr_mutex);
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