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NET: sa11x0-ir: add DMA support for SIR transmit mode
As the DMA engine API allows DMA channels to be reconfigured on the fly, we can now support switching the DMA channel configuration to support SIR transmit DMA without needing to claim an additional physical DMA channel - thereby using up half the DMA channels just for one driver. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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@ -81,6 +81,13 @@ static int sa1100_irda_set_speed(struct sa1100_irda *, int);
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#define HPSIR_MAX_RXLEN 2047
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static struct dma_slave_config sa1100_irda_sir_tx = {
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.direction = DMA_TO_DEVICE,
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.dst_addr = __PREG(Ser2UTDR),
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.dst_addr_width = DMA_SLAVE_BUSWIDTH_1_BYTE,
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.dst_maxburst = 4,
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};
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static struct dma_slave_config sa1100_irda_fir_rx = {
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.direction = DMA_FROM_DEVICE,
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.src_addr = __PREG(Ser2HSDR),
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@ -215,6 +222,36 @@ static void sa1100_irda_check_speed(struct sa1100_irda *si)
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/*
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* HP-SIR format support.
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*/
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static void sa1100_irda_sirtxdma_irq(void *id)
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{
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struct net_device *dev = id;
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struct sa1100_irda *si = netdev_priv(dev);
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dma_unmap_sg(si->dma_tx.dev, &si->dma_tx.sg, 1, DMA_TO_DEVICE);
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dev_kfree_skb(si->dma_tx.skb);
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si->dma_tx.skb = NULL;
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dev->stats.tx_packets++;
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dev->stats.tx_bytes += sg_dma_len(&si->dma_tx.sg);
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/* We need to ensure that the transmitter has finished. */
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do
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rmb();
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while (Ser2UTSR1 & UTSR1_TBY);
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/*
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* Ok, we've finished transmitting. Now enable the receiver.
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* Sometimes we get a receive IRQ immediately after a transmit...
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*/
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Ser2UTSR0 = UTSR0_REB | UTSR0_RBB | UTSR0_RID;
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Ser2UTCR3 = UTCR3_RIE | UTCR3_RXE | UTCR3_TXE;
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sa1100_irda_check_speed(si);
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/* I'm hungry! */
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netif_wake_queue(dev);
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}
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static int sa1100_irda_sir_tx_start(struct sk_buff *skb, struct net_device *dev,
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struct sa1100_irda *si)
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{
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@ -222,14 +259,22 @@ static int sa1100_irda_sir_tx_start(struct sk_buff *skb, struct net_device *dev,
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si->tx_buff.len = async_wrap_skb(skb, si->tx_buff.data,
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si->tx_buff.truesize);
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/*
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* Set the transmit interrupt enable. This will fire off an
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* interrupt immediately. Note that we disable the receiver
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* so we won't get spurious characters received.
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*/
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Ser2UTCR3 = UTCR3_TIE | UTCR3_TXE;
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si->dma_tx.skb = skb;
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sg_set_buf(&si->dma_tx.sg, si->tx_buff.data, si->tx_buff.len);
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if (dma_map_sg(si->dma_tx.dev, &si->dma_tx.sg, 1, DMA_TO_DEVICE) == 0) {
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si->dma_tx.skb = NULL;
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netif_wake_queue(dev);
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dev->stats.tx_dropped++;
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return NETDEV_TX_OK;
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}
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dev_kfree_skb(skb);
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sa1100_irda_dma_start(&si->dma_tx, DMA_MEM_TO_DEV, sa1100_irda_sirtxdma_irq, dev);
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/*
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* The mean turn-around time is enforced by XBOF padding,
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* so we don't have to do anything special here.
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*/
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Ser2UTCR3 = UTCR3_TXE;
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return NETDEV_TX_OK;
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}
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@ -288,43 +333,6 @@ static irqreturn_t sa1100_irda_sir_irq(struct net_device *dev, struct sa1100_ird
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}
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if (status & UTSR0_TFS && si->tx_buff.len) {
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/*
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* Transmitter FIFO is not full
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*/
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do {
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Ser2UTDR = *si->tx_buff.data++;
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si->tx_buff.len -= 1;
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} while (Ser2UTSR1 & UTSR1_TNF && si->tx_buff.len);
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if (si->tx_buff.len == 0) {
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dev->stats.tx_packets++;
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dev->stats.tx_bytes += si->tx_buff.data -
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si->tx_buff.head;
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/*
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* We need to ensure that the transmitter has
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* finished.
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*/
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do
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rmb();
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while (Ser2UTSR1 & UTSR1_TBY);
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/*
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* Ok, we've finished transmitting. Now enable
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* the receiver. Sometimes we get a receive IRQ
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* immediately after a transmit...
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*/
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Ser2UTSR0 = UTSR0_REB | UTSR0_RBB | UTSR0_RID;
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Ser2UTCR3 = UTCR3_RIE | UTCR3_RXE | UTCR3_TXE;
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sa1100_irda_check_speed(si);
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/* I'm hungry! */
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netif_wake_queue(dev);
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}
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}
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return IRQ_HANDLED;
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}
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@ -545,8 +553,11 @@ static int sa1100_irda_set_speed(struct sa1100_irda *si, int speed)
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brd = 3686400 / (16 * speed) - 1;
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/* Stop the receive DMA, and configure transmit. */
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if (IS_FIR(si))
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if (IS_FIR(si)) {
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dmaengine_terminate_all(si->dma_rx.chan);
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dmaengine_slave_config(si->dma_tx.chan,
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&sa1100_irda_sir_tx);
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}
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local_irq_save(flags);
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@ -574,6 +585,10 @@ static int sa1100_irda_set_speed(struct sa1100_irda *si, int speed)
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break;
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case 4000000:
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if (!IS_FIR(si))
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dmaengine_slave_config(si->dma_tx.chan,
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&sa1100_irda_fir_tx);
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local_irq_save(flags);
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Ser2HSSR0 = 0xff;
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