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IB/hfi1: Remove EPROM functionality from data device
Remove EPROM handling from the cdev which is used for user application data traffic. Reviewed-by: Dean Luick <dean.luick@intel.com> Reviewed-by: Mike Marciniszyn <mike.marciniszyn@intel.com> Signed-off-by: Dennis Dalessandro <dennis.dalessandro@intel.com> Signed-off-by: Doug Ledford <dledford@redhat.com>
This commit is contained in:
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7312f29d8e
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d079031742
@ -49,387 +49,18 @@
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#include "common.h"
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#include "eprom.h"
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/*
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* The EPROM is logically divided into three partitions:
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* partition 0: the first 128K, visible from PCI ROM BAR
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* partition 1: 4K config file (sector size)
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* partition 2: the rest
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*/
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#define P0_SIZE (128 * 1024)
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#define P1_SIZE (4 * 1024)
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#define P1_START P0_SIZE
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#define P2_START (P0_SIZE + P1_SIZE)
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/* erase sizes supported by the controller */
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#define SIZE_4KB (4 * 1024)
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#define MASK_4KB (SIZE_4KB - 1)
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#define SIZE_32KB (32 * 1024)
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#define MASK_32KB (SIZE_32KB - 1)
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#define SIZE_64KB (64 * 1024)
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#define MASK_64KB (SIZE_64KB - 1)
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/* controller page size, in bytes */
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#define EP_PAGE_SIZE 256
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#define EEP_PAGE_MASK (EP_PAGE_SIZE - 1)
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/* controller commands */
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#define CMD_SHIFT 24
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#define CMD_NOP (0)
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#define CMD_PAGE_PROGRAM(addr) ((0x02 << CMD_SHIFT) | addr)
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#define CMD_READ_DATA(addr) ((0x03 << CMD_SHIFT) | addr)
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#define CMD_READ_SR1 ((0x05 << CMD_SHIFT))
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#define CMD_WRITE_ENABLE ((0x06 << CMD_SHIFT))
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#define CMD_SECTOR_ERASE_4KB(addr) ((0x20 << CMD_SHIFT) | addr)
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#define CMD_SECTOR_ERASE_32KB(addr) ((0x52 << CMD_SHIFT) | addr)
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#define CMD_CHIP_ERASE ((0x60 << CMD_SHIFT))
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#define CMD_READ_MANUF_DEV_ID ((0x90 << CMD_SHIFT))
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#define CMD_RELEASE_POWERDOWN_NOID ((0xab << CMD_SHIFT))
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#define CMD_SECTOR_ERASE_64KB(addr) ((0xd8 << CMD_SHIFT) | addr)
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/* controller interface speeds */
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#define EP_SPEED_FULL 0x2 /* full speed */
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/* controller status register 1 bits */
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#define SR1_BUSY 0x1ull /* the BUSY bit in SR1 */
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/* sleep length while waiting for controller */
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#define WAIT_SLEEP_US 100 /* must be larger than 5 (see usage) */
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#define COUNT_DELAY_SEC(n) ((n) * (1000000 / WAIT_SLEEP_US))
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/* GPIO pins */
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#define EPROM_WP_N BIT_ULL(14) /* EPROM write line */
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/*
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* How long to wait for the EPROM to become available, in ms.
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* The spec 32 Mb EPROM takes around 40s to erase then write.
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* Double it for safety.
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*/
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#define EPROM_TIMEOUT 80000 /* ms */
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/*
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* Turn on external enable line that allows writing on the flash.
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*/
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static void write_enable(struct hfi1_devdata *dd)
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{
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/* raise signal */
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write_csr(dd, ASIC_GPIO_OUT, read_csr(dd, ASIC_GPIO_OUT) | EPROM_WP_N);
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/* raise enable */
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write_csr(dd, ASIC_GPIO_OE, read_csr(dd, ASIC_GPIO_OE) | EPROM_WP_N);
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}
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/*
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* Turn off external enable line that allows writing on the flash.
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*/
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static void write_disable(struct hfi1_devdata *dd)
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{
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/* lower signal */
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write_csr(dd, ASIC_GPIO_OUT, read_csr(dd, ASIC_GPIO_OUT) & ~EPROM_WP_N);
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/* lower enable */
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write_csr(dd, ASIC_GPIO_OE, read_csr(dd, ASIC_GPIO_OE) & ~EPROM_WP_N);
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}
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/*
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* Wait for the device to become not busy. Must be called after all
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* write or erase operations.
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*/
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static int wait_for_not_busy(struct hfi1_devdata *dd)
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{
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unsigned long count = 0;
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u64 reg;
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int ret = 0;
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/* starts page mode */
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write_csr(dd, ASIC_EEP_ADDR_CMD, CMD_READ_SR1);
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while (1) {
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udelay(WAIT_SLEEP_US);
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usleep_range(WAIT_SLEEP_US - 5, WAIT_SLEEP_US + 5);
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count++;
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reg = read_csr(dd, ASIC_EEP_DATA);
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if ((reg & SR1_BUSY) == 0)
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break;
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/* 200s is the largest time for a 128Mb device */
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if (count > COUNT_DELAY_SEC(200)) {
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dd_dev_err(dd, "waited too long for SPI FLASH busy to clear - failing\n");
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ret = -ETIMEDOUT;
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break; /* break, not goto - must stop page mode */
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}
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}
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/* stop page mode with a NOP */
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write_csr(dd, ASIC_EEP_ADDR_CMD, CMD_NOP);
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return ret;
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}
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/*
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* Read the device ID from the SPI controller.
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*/
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static u32 read_device_id(struct hfi1_devdata *dd)
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{
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/* read the Manufacture Device ID */
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write_csr(dd, ASIC_EEP_ADDR_CMD, CMD_READ_MANUF_DEV_ID);
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return (u32)read_csr(dd, ASIC_EEP_DATA);
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}
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/*
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* Erase the whole flash.
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*/
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static int erase_chip(struct hfi1_devdata *dd)
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{
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int ret;
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write_enable(dd);
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write_csr(dd, ASIC_EEP_ADDR_CMD, CMD_WRITE_ENABLE);
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write_csr(dd, ASIC_EEP_ADDR_CMD, CMD_CHIP_ERASE);
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ret = wait_for_not_busy(dd);
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write_disable(dd);
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return ret;
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}
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/*
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* Erase a range.
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*/
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static int erase_range(struct hfi1_devdata *dd, u32 start, u32 len)
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{
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u32 end = start + len;
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int ret = 0;
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if (end < start)
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return -EINVAL;
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/* check the end points for the minimum erase */
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if ((start & MASK_4KB) || (end & MASK_4KB)) {
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dd_dev_err(dd,
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"%s: non-aligned range (0x%x,0x%x) for a 4KB erase\n",
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__func__, start, end);
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return -EINVAL;
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}
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write_enable(dd);
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while (start < end) {
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write_csr(dd, ASIC_EEP_ADDR_CMD, CMD_WRITE_ENABLE);
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/* check in order of largest to smallest */
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if (((start & MASK_64KB) == 0) && (start + SIZE_64KB <= end)) {
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write_csr(dd, ASIC_EEP_ADDR_CMD,
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CMD_SECTOR_ERASE_64KB(start));
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start += SIZE_64KB;
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} else if (((start & MASK_32KB) == 0) &&
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(start + SIZE_32KB <= end)) {
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write_csr(dd, ASIC_EEP_ADDR_CMD,
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CMD_SECTOR_ERASE_32KB(start));
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start += SIZE_32KB;
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} else { /* 4KB will work */
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write_csr(dd, ASIC_EEP_ADDR_CMD,
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CMD_SECTOR_ERASE_4KB(start));
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start += SIZE_4KB;
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}
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ret = wait_for_not_busy(dd);
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if (ret)
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goto done;
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}
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done:
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write_disable(dd);
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return ret;
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}
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/*
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* Read a 256 byte (64 dword) EPROM page.
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* All callers have verified the offset is at a page boundary.
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*/
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static void read_page(struct hfi1_devdata *dd, u32 offset, u32 *result)
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{
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int i;
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write_csr(dd, ASIC_EEP_ADDR_CMD, CMD_READ_DATA(offset));
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for (i = 0; i < EP_PAGE_SIZE / sizeof(u32); i++)
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result[i] = (u32)read_csr(dd, ASIC_EEP_DATA);
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write_csr(dd, ASIC_EEP_ADDR_CMD, CMD_NOP); /* close open page */
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}
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/*
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* Read length bytes starting at offset. Copy to user address addr.
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*/
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static int read_length(struct hfi1_devdata *dd, u32 start, u32 len, u64 addr)
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{
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u32 offset;
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u32 buffer[EP_PAGE_SIZE / sizeof(u32)];
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int ret = 0;
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/* reject anything not on an EPROM page boundary */
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if ((start & EEP_PAGE_MASK) || (len & EEP_PAGE_MASK))
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return -EINVAL;
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for (offset = 0; offset < len; offset += EP_PAGE_SIZE) {
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read_page(dd, start + offset, buffer);
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if (copy_to_user((void __user *)(addr + offset),
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buffer, EP_PAGE_SIZE)) {
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ret = -EFAULT;
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goto done;
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}
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}
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done:
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return ret;
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}
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/*
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* Write a 256 byte (64 dword) EPROM page.
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* All callers have verified the offset is at a page boundary.
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*/
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static int write_page(struct hfi1_devdata *dd, u32 offset, u32 *data)
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{
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int i;
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write_csr(dd, ASIC_EEP_ADDR_CMD, CMD_WRITE_ENABLE);
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write_csr(dd, ASIC_EEP_DATA, data[0]);
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write_csr(dd, ASIC_EEP_ADDR_CMD, CMD_PAGE_PROGRAM(offset));
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for (i = 1; i < EP_PAGE_SIZE / sizeof(u32); i++)
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write_csr(dd, ASIC_EEP_DATA, data[i]);
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/* will close the open page */
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return wait_for_not_busy(dd);
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}
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/*
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* Write length bytes starting at offset. Read from user address addr.
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*/
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static int write_length(struct hfi1_devdata *dd, u32 start, u32 len, u64 addr)
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{
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u32 offset;
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u32 buffer[EP_PAGE_SIZE / sizeof(u32)];
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int ret = 0;
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/* reject anything not on an EPROM page boundary */
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if ((start & EEP_PAGE_MASK) || (len & EEP_PAGE_MASK))
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return -EINVAL;
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write_enable(dd);
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for (offset = 0; offset < len; offset += EP_PAGE_SIZE) {
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if (copy_from_user(buffer, (void __user *)(addr + offset),
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EP_PAGE_SIZE)) {
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ret = -EFAULT;
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goto done;
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}
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ret = write_page(dd, start + offset, buffer);
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if (ret)
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goto done;
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}
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done:
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write_disable(dd);
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return ret;
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}
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/* convert an range composite to a length, in bytes */
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static inline u32 extract_rlen(u32 composite)
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{
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return (composite & 0xffff) * EP_PAGE_SIZE;
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}
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/* convert an range composite to a start, in bytes */
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static inline u32 extract_rstart(u32 composite)
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{
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return (composite >> 16) * EP_PAGE_SIZE;
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}
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/*
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* Perform the given operation on the EPROM. Called from user space. The
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* user credentials have already been checked.
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*
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* Return 0 on success, -ERRNO on error
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*/
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int handle_eprom_command(struct file *fp, const struct hfi1_cmd *cmd)
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{
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struct hfi1_devdata *dd;
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u32 dev_id;
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u32 rlen; /* range length */
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u32 rstart; /* range start */
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int i_minor;
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int ret = 0;
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/*
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* Map the device file to device data using the relative minor.
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* The device file minor number is the unit number + 1. 0 is
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* the generic device file - reject it.
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*/
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i_minor = iminor(file_inode(fp)) - HFI1_USER_MINOR_BASE;
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if (i_minor <= 0)
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return -EINVAL;
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dd = hfi1_lookup(i_minor - 1);
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if (!dd) {
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pr_err("%s: cannot find unit %d!\n", __func__, i_minor);
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return -EINVAL;
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}
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/* some devices do not have an EPROM */
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if (!dd->eprom_available)
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return -EOPNOTSUPP;
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ret = acquire_chip_resource(dd, CR_EPROM, EPROM_TIMEOUT);
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if (ret) {
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dd_dev_err(dd, "%s: unable to acquire EPROM resource\n",
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__func__);
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goto done_asic;
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}
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dd_dev_info(dd, "%s: cmd: type %d, len 0x%x, addr 0x%016llx\n",
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__func__, cmd->type, cmd->len, cmd->addr);
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switch (cmd->type) {
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case HFI1_CMD_EP_INFO:
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if (cmd->len != sizeof(u32)) {
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ret = -ERANGE;
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break;
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}
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dev_id = read_device_id(dd);
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/* addr points to a u32 user buffer */
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if (copy_to_user((void __user *)cmd->addr, &dev_id,
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sizeof(u32)))
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ret = -EFAULT;
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break;
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case HFI1_CMD_EP_ERASE_CHIP:
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ret = erase_chip(dd);
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break;
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case HFI1_CMD_EP_ERASE_RANGE:
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rlen = extract_rlen(cmd->len);
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rstart = extract_rstart(cmd->len);
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ret = erase_range(dd, rstart, rlen);
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break;
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case HFI1_CMD_EP_READ_RANGE:
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rlen = extract_rlen(cmd->len);
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rstart = extract_rstart(cmd->len);
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ret = read_length(dd, rstart, rlen, cmd->addr);
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break;
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case HFI1_CMD_EP_WRITE_RANGE:
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rlen = extract_rlen(cmd->len);
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rstart = extract_rstart(cmd->len);
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ret = write_length(dd, rstart, rlen, cmd->addr);
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break;
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default:
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dd_dev_err(dd, "%s: unexpected command %d\n",
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__func__, cmd->type);
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ret = -EINVAL;
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break;
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}
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release_chip_resource(dd, CR_EPROM);
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done_asic:
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return ret;
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}
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/*
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* Initialize the EPROM handler.
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*/
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@ -189,7 +189,6 @@ static ssize_t hfi1_file_write(struct file *fp, const char __user *data,
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void *dest = NULL;
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__u64 user_val = 0;
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int uctxt_required = 1;
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int must_be_root = 0;
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/* FIXME: This interface cannot continue out of staging */
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if (WARN_ON_ONCE(!ib_safe_file_access(fp)))
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@ -234,15 +233,6 @@ static ssize_t hfi1_file_write(struct file *fp, const char __user *data,
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copy = 0;
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user_val = cmd.addr;
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break;
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case HFI1_CMD_EP_INFO:
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case HFI1_CMD_EP_ERASE_CHIP:
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case HFI1_CMD_EP_ERASE_RANGE:
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case HFI1_CMD_EP_READ_RANGE:
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case HFI1_CMD_EP_WRITE_RANGE:
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uctxt_required = 0; /* assigned user context not required */
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must_be_root = 1; /* validate user */
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copy = 0;
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break;
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default:
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ret = -EINVAL;
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goto bail;
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@ -265,12 +255,6 @@ static ssize_t hfi1_file_write(struct file *fp, const char __user *data,
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goto bail;
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}
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/* only root can do these operations */
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if (must_be_root && !capable(CAP_SYS_ADMIN)) {
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ret = -EPERM;
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goto bail;
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}
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switch (cmd.type) {
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case HFI1_CMD_ASSIGN_CTXT:
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ret = assign_ctxt(fp, &uinfo);
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@ -409,13 +393,6 @@ static ssize_t hfi1_file_write(struct file *fp, const char __user *data,
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sc_return_credits(sc);
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break;
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}
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case HFI1_CMD_EP_INFO:
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case HFI1_CMD_EP_ERASE_CHIP:
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case HFI1_CMD_EP_ERASE_RANGE:
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case HFI1_CMD_EP_READ_RANGE:
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case HFI1_CMD_EP_WRITE_RANGE:
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ret = handle_eprom_command(fp, &cmd);
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break;
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}
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if (ret >= 0)
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@ -122,13 +122,6 @@
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#define HFI1_CMD_SET_PKEY 11 /* set context's pkey */
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#define HFI1_CMD_CTXT_RESET 12 /* reset context's HW send context */
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#define HFI1_CMD_TID_INVAL_READ 13 /* read TID cache invalidations */
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/* separate EPROM commands from normal PSM commands */
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#define HFI1_CMD_EP_INFO 64 /* read EPROM device ID */
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#define HFI1_CMD_EP_ERASE_CHIP 65 /* erase whole EPROM */
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/* range 66-74 no longer used */
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#define HFI1_CMD_EP_ERASE_RANGE 75 /* erase EPROM range */
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#define HFI1_CMD_EP_READ_RANGE 76 /* read EPROM range */
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#define HFI1_CMD_EP_WRITE_RANGE 77 /* write EPROM range */
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#define _HFI1_EVENT_FROZEN_BIT 0
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#define _HFI1_EVENT_LINKDOWN_BIT 1
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