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Merge branch 'pm-shmobile'
* pm-shmobile: ARM: shmobile: Add A4S cpuidle state on sh7372 ARM: shmobile: Make sh7372 cpuidle handling more straightforward ARM: shmobile: Move definition of shmobile_init_late() to header ARM: shmobile: Remove the console check from sh7372_enter_suspend() ARM: shmobile: Rework adding devices to PM domains on AP4EVB ARM: shmobile: Rework adding devices to PM domains on Mackerel ARM: shmobile: Specify device latencies for Mackerel devices directly ARM: shmobile: Specify device latencies for SH7372 devices directly ARM: shmobile: Allow device latencies to be specified directly ARM: shmobile: Set PM domain on/off latencies directly ARM: shmobile: Make rmobile_init_pm_domain() static ARM: shmobile: Move r8a7779's PM domain objects to a table ARM: shmobile: Move r8a7740's PM domain objects to a table ARM: shmobile: Move sh7372's PM domain objects to a table ARM: shmobile: Do not access sh7372 A4S domain internals directly ARM: shmobile: Add routine for automatic PM domains initialization ARM: shmobile: Use domain names when adding subdomains to power domains ARM: shmobile: Drop r8a7779_add_device_to_domain() ARM: shmobile: Use names of power domains for adding devices to them
This commit is contained in:
commit
cf899680fe
@ -3,7 +3,7 @@
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#
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# Common objects
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obj-y := timer.o console.o clock.o common.o
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obj-y := timer.o console.o clock.o
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# CPU objects
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obj-$(CONFIG_ARCH_SH7367) += setup-sh7367.o clock-sh7367.o intc-sh7367.o
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@ -1229,6 +1229,15 @@ static struct i2c_board_info i2c1_devices[] = {
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#define USCCR1 0xE6058144
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static void __init ap4evb_init(void)
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{
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struct pm_domain_device domain_devices[] = {
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{ "A4LC", &lcdc1_device, },
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{ "A4LC", &lcdc_device, },
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{ "A4MP", &fsi_device, },
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{ "A3SP", &sh_mmcif_device, },
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{ "A3SP", &sdhi0_device, },
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{ "A3SP", &sdhi1_device, },
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{ "A4R", &ceu_device, },
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};
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u32 srcr4;
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struct clk *clk;
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@ -1461,14 +1470,8 @@ static void __init ap4evb_init(void)
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platform_add_devices(ap4evb_devices, ARRAY_SIZE(ap4evb_devices));
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rmobile_add_device_to_domain(&sh7372_pd_a4lc, &lcdc1_device);
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rmobile_add_device_to_domain(&sh7372_pd_a4lc, &lcdc_device);
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rmobile_add_device_to_domain(&sh7372_pd_a4mp, &fsi_device);
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rmobile_add_device_to_domain(&sh7372_pd_a3sp, &sh_mmcif_device);
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rmobile_add_device_to_domain(&sh7372_pd_a3sp, &sdhi0_device);
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rmobile_add_device_to_domain(&sh7372_pd_a3sp, &sdhi1_device);
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rmobile_add_device_to_domain(&sh7372_pd_a4r, &ceu_device);
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rmobile_add_devices_to_domains(domain_devices,
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ARRAY_SIZE(domain_devices));
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hdmi_init_pm_clock();
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fsi_init_pm_clock();
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@ -1483,6 +1486,6 @@ MACHINE_START(AP4EVB, "ap4evb")
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.init_irq = sh7372_init_irq,
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.handle_irq = shmobile_handle_irq_intc,
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.init_machine = ap4evb_init,
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.init_late = shmobile_init_late,
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.init_late = sh7372_pm_init_late,
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.timer = &shmobile_timer,
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MACHINE_END
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@ -1182,10 +1182,10 @@ static void __init eva_init(void)
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eva_clock_init();
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rmobile_add_device_to_domain(&r8a7740_pd_a4lc, &lcdc0_device);
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rmobile_add_device_to_domain(&r8a7740_pd_a4lc, &hdmi_lcdc_device);
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rmobile_add_device_to_domain("A4LC", &lcdc0_device);
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rmobile_add_device_to_domain("A4LC", &hdmi_lcdc_device);
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if (usb)
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rmobile_add_device_to_domain(&r8a7740_pd_a3sp, usb);
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rmobile_add_device_to_domain("A3SP", usb);
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}
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static void __init eva_earlytimer_init(void)
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@ -1410,6 +1410,22 @@ static struct i2c_board_info i2c1_devices[] = {
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#define USCCR1 0xE6058144
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static void __init mackerel_init(void)
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{
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struct pm_domain_device domain_devices[] = {
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{ "A4LC", &lcdc_device, },
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{ "A4LC", &hdmi_lcdc_device, },
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{ "A4LC", &meram_device, },
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{ "A4MP", &fsi_device, },
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{ "A3SP", &usbhs0_device, },
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{ "A3SP", &usbhs1_device, },
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{ "A3SP", &nand_flash_device, },
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{ "A3SP", &sh_mmcif_device, },
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{ "A3SP", &sdhi0_device, },
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#if !defined(CONFIG_MMC_SH_MMCIF) && !defined(CONFIG_MMC_SH_MMCIF_MODULE)
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{ "A3SP", &sdhi1_device, },
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#endif
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{ "A3SP", &sdhi2_device, },
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{ "A4R", &ceu_device, },
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};
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u32 srcr4;
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struct clk *clk;
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@ -1624,20 +1640,8 @@ static void __init mackerel_init(void)
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platform_add_devices(mackerel_devices, ARRAY_SIZE(mackerel_devices));
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rmobile_add_device_to_domain(&sh7372_pd_a4lc, &lcdc_device);
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rmobile_add_device_to_domain(&sh7372_pd_a4lc, &hdmi_lcdc_device);
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rmobile_add_device_to_domain(&sh7372_pd_a4lc, &meram_device);
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rmobile_add_device_to_domain(&sh7372_pd_a4mp, &fsi_device);
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rmobile_add_device_to_domain(&sh7372_pd_a3sp, &usbhs0_device);
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rmobile_add_device_to_domain(&sh7372_pd_a3sp, &usbhs1_device);
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rmobile_add_device_to_domain(&sh7372_pd_a3sp, &nand_flash_device);
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rmobile_add_device_to_domain(&sh7372_pd_a3sp, &sh_mmcif_device);
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rmobile_add_device_to_domain(&sh7372_pd_a3sp, &sdhi0_device);
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#if !defined(CONFIG_MMC_SH_MMCIF) && !defined(CONFIG_MMC_SH_MMCIF_MODULE)
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rmobile_add_device_to_domain(&sh7372_pd_a3sp, &sdhi1_device);
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#endif
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rmobile_add_device_to_domain(&sh7372_pd_a3sp, &sdhi2_device);
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rmobile_add_device_to_domain(&sh7372_pd_a4r, &ceu_device);
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rmobile_add_devices_to_domains(domain_devices,
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ARRAY_SIZE(domain_devices));
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hdmi_init_pm_clock();
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sh7372_pm_init();
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@ -1651,6 +1655,6 @@ MACHINE_START(MACKEREL, "mackerel")
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.init_irq = sh7372_init_irq,
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.handle_irq = shmobile_handle_irq_intc,
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.init_machine = mackerel_init,
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.init_late = shmobile_init_late,
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.init_late = sh7372_pm_init_late,
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.timer = &shmobile_timer,
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MACHINE_END
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@ -1,24 +0,0 @@
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/*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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*
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*/
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <mach/common.h>
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void __init shmobile_init_late(void)
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{
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shmobile_suspend_init();
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shmobile_cpuidle_init();
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}
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@ -16,51 +16,38 @@
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#include <asm/cpuidle.h>
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#include <asm/io.h>
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static void shmobile_enter_wfi(void)
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int shmobile_enter_wfi(struct cpuidle_device *dev, struct cpuidle_driver *drv,
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int index)
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{
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cpu_do_idle();
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}
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void (*shmobile_cpuidle_modes[CPUIDLE_STATE_MAX])(void) = {
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shmobile_enter_wfi, /* regular sleep mode */
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};
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static int shmobile_cpuidle_enter(struct cpuidle_device *dev,
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struct cpuidle_driver *drv,
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int index)
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{
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shmobile_cpuidle_modes[index]();
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return index;
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return 0;
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}
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static struct cpuidle_device shmobile_cpuidle_dev;
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static struct cpuidle_driver shmobile_cpuidle_driver = {
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static struct cpuidle_driver shmobile_cpuidle_default_driver = {
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.name = "shmobile_cpuidle",
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.owner = THIS_MODULE,
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.en_core_tk_irqen = 1,
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.states[0] = ARM_CPUIDLE_WFI_STATE,
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.states[0].enter = shmobile_enter_wfi,
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.safe_state_index = 0, /* C1 */
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.state_count = 1,
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};
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void (*shmobile_cpuidle_setup)(struct cpuidle_driver *drv);
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static struct cpuidle_driver *cpuidle_drv = &shmobile_cpuidle_default_driver;
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void shmobile_cpuidle_set_driver(struct cpuidle_driver *drv)
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{
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cpuidle_drv = drv;
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}
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int shmobile_cpuidle_init(void)
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{
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struct cpuidle_device *dev = &shmobile_cpuidle_dev;
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struct cpuidle_driver *drv = &shmobile_cpuidle_driver;
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int i;
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for (i = 0; i < CPUIDLE_STATE_MAX; i++)
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drv->states[i].enter = shmobile_cpuidle_enter;
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cpuidle_register_driver(cpuidle_drv);
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if (shmobile_cpuidle_setup)
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shmobile_cpuidle_setup(drv);
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cpuidle_register_driver(drv);
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dev->state_count = drv->state_count;
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dev->state_count = cpuidle_drv->state_count;
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cpuidle_register_device(dev);
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return 0;
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@ -14,8 +14,10 @@ extern int shmobile_clk_init(void);
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extern void shmobile_handle_irq_intc(struct pt_regs *);
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extern struct platform_suspend_ops shmobile_suspend_ops;
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struct cpuidle_driver;
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extern void (*shmobile_cpuidle_modes[])(void);
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extern void (*shmobile_cpuidle_setup)(struct cpuidle_driver *drv);
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struct cpuidle_device;
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extern int shmobile_enter_wfi(struct cpuidle_device *dev,
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struct cpuidle_driver *drv, int index);
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extern void shmobile_cpuidle_set_driver(struct cpuidle_driver *drv);
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extern void sh7367_init_irq(void);
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extern void sh7367_map_io(void);
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@ -86,8 +88,6 @@ extern int r8a7779_boot_secondary(unsigned int cpu);
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extern void r8a7779_smp_prepare_cpus(void);
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extern void r8a7779_register_twd(void);
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extern void shmobile_init_late(void);
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#ifdef CONFIG_SUSPEND
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int shmobile_suspend_init(void);
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#else
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@ -100,4 +100,10 @@ int shmobile_cpuidle_init(void);
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static inline int shmobile_cpuidle_init(void) { return 0; }
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#endif
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static inline void shmobile_init_late(void)
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{
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shmobile_suspend_init();
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shmobile_cpuidle_init();
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}
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#endif /* __ARCH_MACH_COMMON_H */
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|
@ -12,6 +12,8 @@
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#include <linux/pm_domain.h>
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#define DEFAULT_DEV_LATENCY_NS 250000
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struct platform_device;
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struct rmobile_pm_domain {
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@ -29,16 +31,33 @@ struct rmobile_pm_domain *to_rmobile_pd(struct generic_pm_domain *d)
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return container_of(d, struct rmobile_pm_domain, genpd);
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}
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struct pm_domain_device {
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const char *domain_name;
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struct platform_device *pdev;
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};
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#ifdef CONFIG_PM
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extern void rmobile_init_pm_domain(struct rmobile_pm_domain *rmobile_pd);
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extern void rmobile_add_device_to_domain(struct rmobile_pm_domain *rmobile_pd,
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struct platform_device *pdev);
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extern void rmobile_pm_add_subdomain(struct rmobile_pm_domain *rmobile_pd,
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struct rmobile_pm_domain *rmobile_sd);
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extern void rmobile_init_domains(struct rmobile_pm_domain domains[], int num);
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extern void rmobile_add_device_to_domain_td(const char *domain_name,
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struct platform_device *pdev,
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struct gpd_timing_data *td);
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static inline void rmobile_add_device_to_domain(const char *domain_name,
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struct platform_device *pdev)
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{
|
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rmobile_add_device_to_domain_td(domain_name, pdev, NULL);
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}
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|
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extern void rmobile_add_devices_to_domains(struct pm_domain_device data[],
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int size);
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#else
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#define rmobile_init_pm_domain(pd) do { } while (0)
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#define rmobile_add_device_to_domain(pd, pdev) do { } while (0)
|
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#define rmobile_pm_add_subdomain(pd, sd) do { } while (0)
|
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|
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#define rmobile_init_domains(domains, num) do { } while (0)
|
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#define rmobile_add_device_to_domain_td(name, pdev, td) do { } while (0)
|
||||
#define rmobile_add_device_to_domain(name, pdev) do { } while (0)
|
||||
|
||||
static inline void rmobile_add_devices_to_domains(struct pm_domain_device d[],
|
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int size) {}
|
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#endif /* CONFIG_PM */
|
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|
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#endif /* PM_RMOBILE_H */
|
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|
@ -607,9 +607,9 @@ enum {
|
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};
|
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|
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#ifdef CONFIG_PM
|
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extern struct rmobile_pm_domain r8a7740_pd_a4s;
|
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extern struct rmobile_pm_domain r8a7740_pd_a3sp;
|
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extern struct rmobile_pm_domain r8a7740_pd_a4lc;
|
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extern void __init r8a7740_init_pm_domains(void);
|
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#else
|
||||
static inline void r8a7740_init_pm_domains(void) {}
|
||||
#endif /* CONFIG_PM */
|
||||
|
||||
#endif /* __ASM_R8A7740_H__ */
|
||||
|
@ -347,17 +347,9 @@ extern int r8a7779_sysc_power_down(struct r8a7779_pm_ch *r8a7779_ch);
|
||||
extern int r8a7779_sysc_power_up(struct r8a7779_pm_ch *r8a7779_ch);
|
||||
|
||||
#ifdef CONFIG_PM
|
||||
extern struct r8a7779_pm_domain r8a7779_sh4a;
|
||||
extern struct r8a7779_pm_domain r8a7779_sgx;
|
||||
extern struct r8a7779_pm_domain r8a7779_vdp1;
|
||||
extern struct r8a7779_pm_domain r8a7779_impx3;
|
||||
|
||||
extern void r8a7779_init_pm_domain(struct r8a7779_pm_domain *r8a7779_pd);
|
||||
extern void r8a7779_add_device_to_domain(struct r8a7779_pm_domain *r8a7779_pd,
|
||||
struct platform_device *pdev);
|
||||
extern void __init r8a7779_init_pm_domains(void);
|
||||
#else
|
||||
#define r8a7779_init_pm_domain(pd) do { } while (0)
|
||||
#define r8a7779_add_device_to_domain(pd, pdev) do { } while (0)
|
||||
static inline void r8a7779_init_pm_domains(void) {}
|
||||
#endif /* CONFIG_PM */
|
||||
|
||||
#endif /* __ASM_R8A7779_H__ */
|
||||
|
@ -478,21 +478,17 @@ extern struct clk sh7372_fsibck_clk;
|
||||
extern struct clk sh7372_fsidiva_clk;
|
||||
extern struct clk sh7372_fsidivb_clk;
|
||||
|
||||
#ifdef CONFIG_PM
|
||||
extern struct rmobile_pm_domain sh7372_pd_a4lc;
|
||||
extern struct rmobile_pm_domain sh7372_pd_a4mp;
|
||||
extern struct rmobile_pm_domain sh7372_pd_d4;
|
||||
extern struct rmobile_pm_domain sh7372_pd_a4r;
|
||||
extern struct rmobile_pm_domain sh7372_pd_a3rv;
|
||||
extern struct rmobile_pm_domain sh7372_pd_a3ri;
|
||||
extern struct rmobile_pm_domain sh7372_pd_a4s;
|
||||
extern struct rmobile_pm_domain sh7372_pd_a3sp;
|
||||
extern struct rmobile_pm_domain sh7372_pd_a3sg;
|
||||
#endif /* CONFIG_PM */
|
||||
|
||||
extern void sh7372_intcs_suspend(void);
|
||||
extern void sh7372_intcs_resume(void);
|
||||
extern void sh7372_intca_suspend(void);
|
||||
extern void sh7372_intca_resume(void);
|
||||
|
||||
#ifdef CONFIG_PM
|
||||
extern void __init sh7372_init_pm_domains(void);
|
||||
#else
|
||||
static inline void sh7372_init_pm_domains(void) {}
|
||||
#endif
|
||||
|
||||
extern void __init sh7372_pm_init_late(void);
|
||||
|
||||
#endif /* __ASM_SH7372_H__ */
|
||||
|
@ -21,14 +21,6 @@ static int r8a7740_pd_a4s_suspend(void)
|
||||
return -EBUSY;
|
||||
}
|
||||
|
||||
struct rmobile_pm_domain r8a7740_pd_a4s = {
|
||||
.genpd.name = "A4S",
|
||||
.bit_shift = 10,
|
||||
.gov = &pm_domain_always_on_gov,
|
||||
.no_debug = true,
|
||||
.suspend = r8a7740_pd_a4s_suspend,
|
||||
};
|
||||
|
||||
static int r8a7740_pd_a3sp_suspend(void)
|
||||
{
|
||||
/*
|
||||
@ -38,17 +30,31 @@ static int r8a7740_pd_a3sp_suspend(void)
|
||||
return console_suspend_enabled ? 0 : -EBUSY;
|
||||
}
|
||||
|
||||
struct rmobile_pm_domain r8a7740_pd_a3sp = {
|
||||
.genpd.name = "A3SP",
|
||||
.bit_shift = 11,
|
||||
.gov = &pm_domain_always_on_gov,
|
||||
.no_debug = true,
|
||||
.suspend = r8a7740_pd_a3sp_suspend,
|
||||
static struct rmobile_pm_domain r8a7740_pm_domains[] = {
|
||||
{
|
||||
.genpd.name = "A4S",
|
||||
.bit_shift = 10,
|
||||
.gov = &pm_domain_always_on_gov,
|
||||
.no_debug = true,
|
||||
.suspend = r8a7740_pd_a4s_suspend,
|
||||
},
|
||||
{
|
||||
.genpd.name = "A3SP",
|
||||
.bit_shift = 11,
|
||||
.gov = &pm_domain_always_on_gov,
|
||||
.no_debug = true,
|
||||
.suspend = r8a7740_pd_a3sp_suspend,
|
||||
},
|
||||
{
|
||||
.genpd.name = "A4LC",
|
||||
.bit_shift = 1,
|
||||
},
|
||||
};
|
||||
|
||||
struct rmobile_pm_domain r8a7740_pd_a4lc = {
|
||||
.genpd.name = "A4LC",
|
||||
.bit_shift = 1,
|
||||
};
|
||||
void __init r8a7740_init_pm_domains(void)
|
||||
{
|
||||
rmobile_init_domains(r8a7740_pm_domains, ARRAY_SIZE(r8a7740_pm_domains));
|
||||
pm_genpd_add_subdomain_names("A4S", "A3SP");
|
||||
}
|
||||
|
||||
#endif /* CONFIG_PM */
|
||||
|
@ -183,7 +183,7 @@ static bool pd_active_wakeup(struct device *dev)
|
||||
return true;
|
||||
}
|
||||
|
||||
void r8a7779_init_pm_domain(struct r8a7779_pm_domain *r8a7779_pd)
|
||||
static void r8a7779_init_pm_domain(struct r8a7779_pm_domain *r8a7779_pd)
|
||||
{
|
||||
struct generic_pm_domain *genpd = &r8a7779_pd->genpd;
|
||||
|
||||
@ -199,44 +199,45 @@ void r8a7779_init_pm_domain(struct r8a7779_pm_domain *r8a7779_pd)
|
||||
pd_power_up(&r8a7779_pd->genpd);
|
||||
}
|
||||
|
||||
void r8a7779_add_device_to_domain(struct r8a7779_pm_domain *r8a7779_pd,
|
||||
struct platform_device *pdev)
|
||||
static struct r8a7779_pm_domain r8a7779_pm_domains[] = {
|
||||
{
|
||||
.genpd.name = "SH4A",
|
||||
.ch = {
|
||||
.chan_offs = 0x80, /* PWRSR1 .. PWRER1 */
|
||||
.isr_bit = 16, /* SH4A */
|
||||
},
|
||||
},
|
||||
{
|
||||
.genpd.name = "SGX",
|
||||
.ch = {
|
||||
.chan_offs = 0xc0, /* PWRSR2 .. PWRER2 */
|
||||
.isr_bit = 20, /* SGX */
|
||||
},
|
||||
},
|
||||
{
|
||||
.genpd.name = "VDP1",
|
||||
.ch = {
|
||||
.chan_offs = 0x100, /* PWRSR3 .. PWRER3 */
|
||||
.isr_bit = 21, /* VDP */
|
||||
},
|
||||
},
|
||||
{
|
||||
.genpd.name = "IMPX3",
|
||||
.ch = {
|
||||
.chan_offs = 0x140, /* PWRSR4 .. PWRER4 */
|
||||
.isr_bit = 24, /* IMP */
|
||||
},
|
||||
},
|
||||
};
|
||||
|
||||
void __init r8a7779_init_pm_domains(void)
|
||||
{
|
||||
struct device *dev = &pdev->dev;
|
||||
int j;
|
||||
|
||||
pm_genpd_add_device(&r8a7779_pd->genpd, dev);
|
||||
if (pm_clk_no_clocks(dev))
|
||||
pm_clk_add(dev, NULL);
|
||||
for (j = 0; j < ARRAY_SIZE(r8a7779_pm_domains); j++)
|
||||
r8a7779_init_pm_domain(&r8a7779_pm_domains[j]);
|
||||
}
|
||||
|
||||
struct r8a7779_pm_domain r8a7779_sh4a = {
|
||||
.ch = {
|
||||
.chan_offs = 0x80, /* PWRSR1 .. PWRER1 */
|
||||
.isr_bit = 16, /* SH4A */
|
||||
}
|
||||
};
|
||||
|
||||
struct r8a7779_pm_domain r8a7779_sgx = {
|
||||
.ch = {
|
||||
.chan_offs = 0xc0, /* PWRSR2 .. PWRER2 */
|
||||
.isr_bit = 20, /* SGX */
|
||||
}
|
||||
};
|
||||
|
||||
struct r8a7779_pm_domain r8a7779_vdp1 = {
|
||||
.ch = {
|
||||
.chan_offs = 0x100, /* PWRSR3 .. PWRER3 */
|
||||
.isr_bit = 21, /* VDP */
|
||||
}
|
||||
};
|
||||
|
||||
struct r8a7779_pm_domain r8a7779_impx3 = {
|
||||
.ch = {
|
||||
.chan_offs = 0x140, /* PWRSR4 .. PWRER4 */
|
||||
.isr_bit = 24, /* IMP */
|
||||
}
|
||||
};
|
||||
|
||||
#endif /* CONFIG_PM */
|
||||
|
||||
void __init r8a7779_pm_init(void)
|
||||
|
@ -134,7 +134,7 @@ static int rmobile_pd_start_dev(struct device *dev)
|
||||
return ret;
|
||||
}
|
||||
|
||||
void rmobile_init_pm_domain(struct rmobile_pm_domain *rmobile_pd)
|
||||
static void rmobile_init_pm_domain(struct rmobile_pm_domain *rmobile_pd)
|
||||
{
|
||||
struct generic_pm_domain *genpd = &rmobile_pd->genpd;
|
||||
struct dev_power_governor *gov = rmobile_pd->gov;
|
||||
@ -149,19 +149,38 @@ void rmobile_init_pm_domain(struct rmobile_pm_domain *rmobile_pd)
|
||||
__rmobile_pd_power_up(rmobile_pd, false);
|
||||
}
|
||||
|
||||
void rmobile_add_device_to_domain(struct rmobile_pm_domain *rmobile_pd,
|
||||
struct platform_device *pdev)
|
||||
void rmobile_init_domains(struct rmobile_pm_domain domains[], int num)
|
||||
{
|
||||
int j;
|
||||
|
||||
for (j = 0; j < num; j++)
|
||||
rmobile_init_pm_domain(&domains[j]);
|
||||
}
|
||||
|
||||
void rmobile_add_device_to_domain_td(const char *domain_name,
|
||||
struct platform_device *pdev,
|
||||
struct gpd_timing_data *td)
|
||||
{
|
||||
struct device *dev = &pdev->dev;
|
||||
|
||||
pm_genpd_add_device(&rmobile_pd->genpd, dev);
|
||||
__pm_genpd_name_add_device(domain_name, dev, td);
|
||||
if (pm_clk_no_clocks(dev))
|
||||
pm_clk_add(dev, NULL);
|
||||
}
|
||||
|
||||
void rmobile_pm_add_subdomain(struct rmobile_pm_domain *rmobile_pd,
|
||||
struct rmobile_pm_domain *rmobile_sd)
|
||||
void rmobile_add_devices_to_domains(struct pm_domain_device data[],
|
||||
int size)
|
||||
{
|
||||
pm_genpd_add_subdomain(&rmobile_pd->genpd, &rmobile_sd->genpd);
|
||||
struct gpd_timing_data latencies = {
|
||||
.stop_latency_ns = DEFAULT_DEV_LATENCY_NS,
|
||||
.start_latency_ns = DEFAULT_DEV_LATENCY_NS,
|
||||
.save_state_latency_ns = DEFAULT_DEV_LATENCY_NS,
|
||||
.restore_state_latency_ns = DEFAULT_DEV_LATENCY_NS,
|
||||
};
|
||||
int j;
|
||||
|
||||
for (j = 0; j < size; j++)
|
||||
rmobile_add_device_to_domain_td(data[j].domain_name,
|
||||
data[j].pdev, &latencies);
|
||||
}
|
||||
#endif /* CONFIG_PM */
|
||||
|
@ -21,6 +21,7 @@
|
||||
#include <linux/irq.h>
|
||||
#include <linux/bitrev.h>
|
||||
#include <linux/console.h>
|
||||
#include <asm/cpuidle.h>
|
||||
#include <asm/io.h>
|
||||
#include <asm/tlbflush.h>
|
||||
#include <asm/suspend.h>
|
||||
@ -71,20 +72,7 @@
|
||||
|
||||
#ifdef CONFIG_PM
|
||||
|
||||
struct rmobile_pm_domain sh7372_pd_a4lc = {
|
||||
.genpd.name = "A4LC",
|
||||
.bit_shift = 1,
|
||||
};
|
||||
|
||||
struct rmobile_pm_domain sh7372_pd_a4mp = {
|
||||
.genpd.name = "A4MP",
|
||||
.bit_shift = 2,
|
||||
};
|
||||
|
||||
struct rmobile_pm_domain sh7372_pd_d4 = {
|
||||
.genpd.name = "D4",
|
||||
.bit_shift = 3,
|
||||
};
|
||||
#define PM_DOMAIN_ON_OFF_LATENCY_NS 250000
|
||||
|
||||
static int sh7372_a4r_pd_suspend(void)
|
||||
{
|
||||
@ -93,39 +81,25 @@ static int sh7372_a4r_pd_suspend(void)
|
||||
return 0;
|
||||
}
|
||||
|
||||
struct rmobile_pm_domain sh7372_pd_a4r = {
|
||||
.genpd.name = "A4R",
|
||||
.bit_shift = 5,
|
||||
.suspend = sh7372_a4r_pd_suspend,
|
||||
.resume = sh7372_intcs_resume,
|
||||
};
|
||||
static bool a4s_suspend_ready;
|
||||
|
||||
struct rmobile_pm_domain sh7372_pd_a3rv = {
|
||||
.genpd.name = "A3RV",
|
||||
.bit_shift = 6,
|
||||
};
|
||||
|
||||
struct rmobile_pm_domain sh7372_pd_a3ri = {
|
||||
.genpd.name = "A3RI",
|
||||
.bit_shift = 8,
|
||||
};
|
||||
|
||||
static int sh7372_pd_a4s_suspend(void)
|
||||
static int sh7372_a4s_pd_suspend(void)
|
||||
{
|
||||
/*
|
||||
* The A4S domain contains the CPU core and therefore it should
|
||||
* only be turned off if the CPU is in use.
|
||||
* only be turned off if the CPU is not in use. This may happen
|
||||
* during system suspend, when SYSC is going to be used for generating
|
||||
* resume signals and a4s_suspend_ready is set to let
|
||||
* sh7372_enter_suspend() know that it can turn A4S off.
|
||||
*/
|
||||
a4s_suspend_ready = true;
|
||||
return -EBUSY;
|
||||
}
|
||||
|
||||
struct rmobile_pm_domain sh7372_pd_a4s = {
|
||||
.genpd.name = "A4S",
|
||||
.bit_shift = 10,
|
||||
.gov = &pm_domain_always_on_gov,
|
||||
.no_debug = true,
|
||||
.suspend = sh7372_pd_a4s_suspend,
|
||||
};
|
||||
static void sh7372_a4s_pd_resume(void)
|
||||
{
|
||||
a4s_suspend_ready = false;
|
||||
}
|
||||
|
||||
static int sh7372_a3sp_pd_suspend(void)
|
||||
{
|
||||
@ -136,18 +110,80 @@ static int sh7372_a3sp_pd_suspend(void)
|
||||
return console_suspend_enabled ? 0 : -EBUSY;
|
||||
}
|
||||
|
||||
struct rmobile_pm_domain sh7372_pd_a3sp = {
|
||||
.genpd.name = "A3SP",
|
||||
.bit_shift = 11,
|
||||
.gov = &pm_domain_always_on_gov,
|
||||
.no_debug = true,
|
||||
.suspend = sh7372_a3sp_pd_suspend,
|
||||
static struct rmobile_pm_domain sh7372_pm_domains[] = {
|
||||
{
|
||||
.genpd.name = "A4LC",
|
||||
.genpd.power_on_latency_ns = PM_DOMAIN_ON_OFF_LATENCY_NS,
|
||||
.genpd.power_off_latency_ns = PM_DOMAIN_ON_OFF_LATENCY_NS,
|
||||
.bit_shift = 1,
|
||||
},
|
||||
{
|
||||
.genpd.name = "A4MP",
|
||||
.genpd.power_on_latency_ns = PM_DOMAIN_ON_OFF_LATENCY_NS,
|
||||
.genpd.power_off_latency_ns = PM_DOMAIN_ON_OFF_LATENCY_NS,
|
||||
.bit_shift = 2,
|
||||
},
|
||||
{
|
||||
.genpd.name = "D4",
|
||||
.genpd.power_on_latency_ns = PM_DOMAIN_ON_OFF_LATENCY_NS,
|
||||
.genpd.power_off_latency_ns = PM_DOMAIN_ON_OFF_LATENCY_NS,
|
||||
.bit_shift = 3,
|
||||
},
|
||||
{
|
||||
.genpd.name = "A4R",
|
||||
.genpd.power_on_latency_ns = PM_DOMAIN_ON_OFF_LATENCY_NS,
|
||||
.genpd.power_off_latency_ns = PM_DOMAIN_ON_OFF_LATENCY_NS,
|
||||
.bit_shift = 5,
|
||||
.suspend = sh7372_a4r_pd_suspend,
|
||||
.resume = sh7372_intcs_resume,
|
||||
},
|
||||
{
|
||||
.genpd.name = "A3RV",
|
||||
.genpd.power_on_latency_ns = PM_DOMAIN_ON_OFF_LATENCY_NS,
|
||||
.genpd.power_off_latency_ns = PM_DOMAIN_ON_OFF_LATENCY_NS,
|
||||
.bit_shift = 6,
|
||||
},
|
||||
{
|
||||
.genpd.name = "A3RI",
|
||||
.genpd.power_on_latency_ns = PM_DOMAIN_ON_OFF_LATENCY_NS,
|
||||
.genpd.power_off_latency_ns = PM_DOMAIN_ON_OFF_LATENCY_NS,
|
||||
.bit_shift = 8,
|
||||
},
|
||||
{
|
||||
.genpd.name = "A4S",
|
||||
.genpd.power_on_latency_ns = PM_DOMAIN_ON_OFF_LATENCY_NS,
|
||||
.genpd.power_off_latency_ns = PM_DOMAIN_ON_OFF_LATENCY_NS,
|
||||
.bit_shift = 10,
|
||||
.gov = &pm_domain_always_on_gov,
|
||||
.no_debug = true,
|
||||
.suspend = sh7372_a4s_pd_suspend,
|
||||
.resume = sh7372_a4s_pd_resume,
|
||||
},
|
||||
{
|
||||
.genpd.name = "A3SP",
|
||||
.genpd.power_on_latency_ns = PM_DOMAIN_ON_OFF_LATENCY_NS,
|
||||
.genpd.power_off_latency_ns = PM_DOMAIN_ON_OFF_LATENCY_NS,
|
||||
.bit_shift = 11,
|
||||
.gov = &pm_domain_always_on_gov,
|
||||
.no_debug = true,
|
||||
.suspend = sh7372_a3sp_pd_suspend,
|
||||
},
|
||||
{
|
||||
.genpd.name = "A3SG",
|
||||
.genpd.power_on_latency_ns = PM_DOMAIN_ON_OFF_LATENCY_NS,
|
||||
.genpd.power_off_latency_ns = PM_DOMAIN_ON_OFF_LATENCY_NS,
|
||||
.bit_shift = 13,
|
||||
},
|
||||
};
|
||||
|
||||
struct rmobile_pm_domain sh7372_pd_a3sg = {
|
||||
.genpd.name = "A3SG",
|
||||
.bit_shift = 13,
|
||||
};
|
||||
void __init sh7372_init_pm_domains(void)
|
||||
{
|
||||
rmobile_init_domains(sh7372_pm_domains, ARRAY_SIZE(sh7372_pm_domains));
|
||||
pm_genpd_add_subdomain_names("A4LC", "A3RV");
|
||||
pm_genpd_add_subdomain_names("A4R", "A4LC");
|
||||
pm_genpd_add_subdomain_names("A4S", "A3SG");
|
||||
pm_genpd_add_subdomain_names("A4S", "A3SP");
|
||||
}
|
||||
|
||||
#endif /* CONFIG_PM */
|
||||
|
||||
@ -303,6 +339,21 @@ static void sh7372_enter_a3sm_common(int pllc0_on)
|
||||
sh7372_set_reset_vector(__pa(sh7372_resume_core_standby_sysc));
|
||||
sh7372_enter_sysc(pllc0_on, 1 << 12);
|
||||
}
|
||||
|
||||
static void sh7372_enter_a4s_common(int pllc0_on)
|
||||
{
|
||||
sh7372_intca_suspend();
|
||||
sh7372_set_reset_vector(SMFRAM);
|
||||
sh7372_enter_sysc(pllc0_on, 1 << 10);
|
||||
sh7372_intca_resume();
|
||||
}
|
||||
|
||||
static void sh7372_pm_setup_smfram(void)
|
||||
{
|
||||
memcpy((void *)SMFRAM, sh7372_resume_core_standby_sysc, 0x100);
|
||||
}
|
||||
#else
|
||||
static inline void sh7372_pm_setup_smfram(void) {}
|
||||
#endif /* CONFIG_SUSPEND || CONFIG_CPU_IDLE */
|
||||
|
||||
#ifdef CONFIG_CPU_IDLE
|
||||
@ -312,7 +363,8 @@ static int sh7372_do_idle_core_standby(unsigned long unused)
|
||||
return 0;
|
||||
}
|
||||
|
||||
static void sh7372_enter_core_standby(void)
|
||||
static int sh7372_enter_core_standby(struct cpuidle_device *dev,
|
||||
struct cpuidle_driver *drv, int index)
|
||||
{
|
||||
sh7372_set_reset_vector(__pa(sh7372_resume_core_standby_sysc));
|
||||
|
||||
@ -323,83 +375,102 @@ static void sh7372_enter_core_standby(void)
|
||||
|
||||
/* disable reset vector translation */
|
||||
__raw_writel(0, SBAR);
|
||||
|
||||
return 1;
|
||||
}
|
||||
|
||||
static void sh7372_enter_a3sm_pll_on(void)
|
||||
static int sh7372_enter_a3sm_pll_on(struct cpuidle_device *dev,
|
||||
struct cpuidle_driver *drv, int index)
|
||||
{
|
||||
sh7372_enter_a3sm_common(1);
|
||||
return 2;
|
||||
}
|
||||
|
||||
static void sh7372_enter_a3sm_pll_off(void)
|
||||
static int sh7372_enter_a3sm_pll_off(struct cpuidle_device *dev,
|
||||
struct cpuidle_driver *drv, int index)
|
||||
{
|
||||
sh7372_enter_a3sm_common(0);
|
||||
return 3;
|
||||
}
|
||||
|
||||
static void sh7372_cpuidle_setup(struct cpuidle_driver *drv)
|
||||
static int sh7372_enter_a4s(struct cpuidle_device *dev,
|
||||
struct cpuidle_driver *drv, int index)
|
||||
{
|
||||
struct cpuidle_state *state = &drv->states[drv->state_count];
|
||||
unsigned long msk, msk2;
|
||||
|
||||
snprintf(state->name, CPUIDLE_NAME_LEN, "C2");
|
||||
strncpy(state->desc, "Core Standby Mode", CPUIDLE_DESC_LEN);
|
||||
state->exit_latency = 10;
|
||||
state->target_residency = 20 + 10;
|
||||
state->flags = CPUIDLE_FLAG_TIME_VALID;
|
||||
shmobile_cpuidle_modes[drv->state_count] = sh7372_enter_core_standby;
|
||||
drv->state_count++;
|
||||
if (!sh7372_sysc_valid(&msk, &msk2))
|
||||
return sh7372_enter_a3sm_pll_off(dev, drv, index);
|
||||
|
||||
state = &drv->states[drv->state_count];
|
||||
snprintf(state->name, CPUIDLE_NAME_LEN, "C3");
|
||||
strncpy(state->desc, "A3SM PLL ON", CPUIDLE_DESC_LEN);
|
||||
state->exit_latency = 20;
|
||||
state->target_residency = 30 + 20;
|
||||
state->flags = CPUIDLE_FLAG_TIME_VALID;
|
||||
shmobile_cpuidle_modes[drv->state_count] = sh7372_enter_a3sm_pll_on;
|
||||
drv->state_count++;
|
||||
|
||||
state = &drv->states[drv->state_count];
|
||||
snprintf(state->name, CPUIDLE_NAME_LEN, "C4");
|
||||
strncpy(state->desc, "A3SM PLL OFF", CPUIDLE_DESC_LEN);
|
||||
state->exit_latency = 120;
|
||||
state->target_residency = 30 + 120;
|
||||
state->flags = CPUIDLE_FLAG_TIME_VALID;
|
||||
shmobile_cpuidle_modes[drv->state_count] = sh7372_enter_a3sm_pll_off;
|
||||
drv->state_count++;
|
||||
sh7372_setup_sysc(msk, msk2);
|
||||
sh7372_enter_a4s_common(0);
|
||||
return 4;
|
||||
}
|
||||
|
||||
static struct cpuidle_driver sh7372_cpuidle_driver = {
|
||||
.name = "sh7372_cpuidle",
|
||||
.owner = THIS_MODULE,
|
||||
.en_core_tk_irqen = 1,
|
||||
.state_count = 5,
|
||||
.safe_state_index = 0, /* C1 */
|
||||
.states[0] = ARM_CPUIDLE_WFI_STATE,
|
||||
.states[0].enter = shmobile_enter_wfi,
|
||||
.states[1] = {
|
||||
.name = "C2",
|
||||
.desc = "Core Standby Mode",
|
||||
.exit_latency = 10,
|
||||
.target_residency = 20 + 10,
|
||||
.flags = CPUIDLE_FLAG_TIME_VALID,
|
||||
.enter = sh7372_enter_core_standby,
|
||||
},
|
||||
.states[2] = {
|
||||
.name = "C3",
|
||||
.desc = "A3SM PLL ON",
|
||||
.exit_latency = 20,
|
||||
.target_residency = 30 + 20,
|
||||
.flags = CPUIDLE_FLAG_TIME_VALID,
|
||||
.enter = sh7372_enter_a3sm_pll_on,
|
||||
},
|
||||
.states[3] = {
|
||||
.name = "C4",
|
||||
.desc = "A3SM PLL OFF",
|
||||
.exit_latency = 120,
|
||||
.target_residency = 30 + 120,
|
||||
.flags = CPUIDLE_FLAG_TIME_VALID,
|
||||
.enter = sh7372_enter_a3sm_pll_off,
|
||||
},
|
||||
.states[4] = {
|
||||
.name = "C5",
|
||||
.desc = "A4S PLL OFF",
|
||||
.exit_latency = 240,
|
||||
.target_residency = 30 + 240,
|
||||
.flags = CPUIDLE_FLAG_TIME_VALID,
|
||||
.enter = sh7372_enter_a4s,
|
||||
.disabled = true,
|
||||
},
|
||||
};
|
||||
|
||||
static void sh7372_cpuidle_init(void)
|
||||
{
|
||||
shmobile_cpuidle_setup = sh7372_cpuidle_setup;
|
||||
shmobile_cpuidle_set_driver(&sh7372_cpuidle_driver);
|
||||
}
|
||||
#else
|
||||
static void sh7372_cpuidle_init(void) {}
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_SUSPEND
|
||||
static void sh7372_enter_a4s_common(int pllc0_on)
|
||||
{
|
||||
sh7372_intca_suspend();
|
||||
memcpy((void *)SMFRAM, sh7372_resume_core_standby_sysc, 0x100);
|
||||
sh7372_set_reset_vector(SMFRAM);
|
||||
sh7372_enter_sysc(pllc0_on, 1 << 10);
|
||||
sh7372_intca_resume();
|
||||
}
|
||||
|
||||
static int sh7372_enter_suspend(suspend_state_t suspend_state)
|
||||
{
|
||||
unsigned long msk, msk2;
|
||||
|
||||
/* check active clocks to determine potential wakeup sources */
|
||||
if (sh7372_sysc_valid(&msk, &msk2)) {
|
||||
if (!console_suspend_enabled &&
|
||||
sh7372_pd_a4s.genpd.status == GPD_STATE_POWER_OFF) {
|
||||
/* convert INTC mask/sense to SYSC mask/sense */
|
||||
sh7372_setup_sysc(msk, msk2);
|
||||
if (sh7372_sysc_valid(&msk, &msk2) && a4s_suspend_ready) {
|
||||
/* convert INTC mask/sense to SYSC mask/sense */
|
||||
sh7372_setup_sysc(msk, msk2);
|
||||
|
||||
/* enter A4S sleep with PLLC0 off */
|
||||
pr_debug("entering A4S\n");
|
||||
sh7372_enter_a4s_common(0);
|
||||
return 0;
|
||||
}
|
||||
/* enter A4S sleep with PLLC0 off */
|
||||
pr_debug("entering A4S\n");
|
||||
sh7372_enter_a4s_common(0);
|
||||
return 0;
|
||||
}
|
||||
|
||||
/* default to enter A3SM sleep with PLLC0 off */
|
||||
@ -425,7 +496,7 @@ static int sh7372_pm_notifier_fn(struct notifier_block *notifier,
|
||||
* executed during system suspend and resume, respectively, so
|
||||
* that those functions don't crash while accessing the INTCS.
|
||||
*/
|
||||
pm_genpd_poweron(&sh7372_pd_a4r.genpd);
|
||||
pm_genpd_name_poweron("A4R");
|
||||
break;
|
||||
case PM_POST_SUSPEND:
|
||||
pm_genpd_poweroff_unused();
|
||||
@ -454,6 +525,14 @@ void __init sh7372_pm_init(void)
|
||||
/* do not convert A3SM, A3SP, A3SG, A4R power down into A4S */
|
||||
__raw_writel(0, PDNSEL);
|
||||
|
||||
sh7372_pm_setup_smfram();
|
||||
|
||||
sh7372_suspend_init();
|
||||
sh7372_cpuidle_init();
|
||||
}
|
||||
|
||||
void __init sh7372_pm_init_late(void)
|
||||
{
|
||||
shmobile_init_late();
|
||||
pm_genpd_name_attach_cpuidle("A4S", 4);
|
||||
}
|
||||
|
@ -673,12 +673,7 @@ void __init r8a7740_add_standard_devices(void)
|
||||
r8a7740_i2c_workaround(&i2c0_device);
|
||||
r8a7740_i2c_workaround(&i2c1_device);
|
||||
|
||||
/* PM domain */
|
||||
rmobile_init_pm_domain(&r8a7740_pd_a4s);
|
||||
rmobile_init_pm_domain(&r8a7740_pd_a3sp);
|
||||
rmobile_init_pm_domain(&r8a7740_pd_a4lc);
|
||||
|
||||
rmobile_pm_add_subdomain(&r8a7740_pd_a4s, &r8a7740_pd_a3sp);
|
||||
r8a7740_init_pm_domains();
|
||||
|
||||
/* add devices */
|
||||
platform_add_devices(r8a7740_early_devices,
|
||||
@ -688,16 +683,16 @@ void __init r8a7740_add_standard_devices(void)
|
||||
|
||||
/* add devices to PM domain */
|
||||
|
||||
rmobile_add_device_to_domain(&r8a7740_pd_a3sp, &scif0_device);
|
||||
rmobile_add_device_to_domain(&r8a7740_pd_a3sp, &scif1_device);
|
||||
rmobile_add_device_to_domain(&r8a7740_pd_a3sp, &scif2_device);
|
||||
rmobile_add_device_to_domain(&r8a7740_pd_a3sp, &scif3_device);
|
||||
rmobile_add_device_to_domain(&r8a7740_pd_a3sp, &scif4_device);
|
||||
rmobile_add_device_to_domain(&r8a7740_pd_a3sp, &scif5_device);
|
||||
rmobile_add_device_to_domain(&r8a7740_pd_a3sp, &scif6_device);
|
||||
rmobile_add_device_to_domain(&r8a7740_pd_a3sp, &scif7_device);
|
||||
rmobile_add_device_to_domain(&r8a7740_pd_a3sp, &scifb_device);
|
||||
rmobile_add_device_to_domain(&r8a7740_pd_a3sp, &i2c1_device);
|
||||
rmobile_add_device_to_domain("A3SP", &scif0_device);
|
||||
rmobile_add_device_to_domain("A3SP", &scif1_device);
|
||||
rmobile_add_device_to_domain("A3SP", &scif2_device);
|
||||
rmobile_add_device_to_domain("A3SP", &scif3_device);
|
||||
rmobile_add_device_to_domain("A3SP", &scif4_device);
|
||||
rmobile_add_device_to_domain("A3SP", &scif5_device);
|
||||
rmobile_add_device_to_domain("A3SP", &scif6_device);
|
||||
rmobile_add_device_to_domain("A3SP", &scif7_device);
|
||||
rmobile_add_device_to_domain("A3SP", &scifb_device);
|
||||
rmobile_add_device_to_domain("A3SP", &i2c1_device);
|
||||
}
|
||||
|
||||
static void __init r8a7740_earlytimer_init(void)
|
||||
|
@ -251,10 +251,7 @@ void __init r8a7779_add_standard_devices(void)
|
||||
#endif
|
||||
r8a7779_pm_init();
|
||||
|
||||
r8a7779_init_pm_domain(&r8a7779_sh4a);
|
||||
r8a7779_init_pm_domain(&r8a7779_sgx);
|
||||
r8a7779_init_pm_domain(&r8a7779_vdp1);
|
||||
r8a7779_init_pm_domain(&r8a7779_impx3);
|
||||
r8a7779_init_pm_domains();
|
||||
|
||||
platform_add_devices(r8a7779_early_devices,
|
||||
ARRAY_SIZE(r8a7779_early_devices));
|
||||
|
@ -1001,21 +1001,34 @@ static struct platform_device *sh7372_late_devices[] __initdata = {
|
||||
|
||||
void __init sh7372_add_standard_devices(void)
|
||||
{
|
||||
rmobile_init_pm_domain(&sh7372_pd_a4lc);
|
||||
rmobile_init_pm_domain(&sh7372_pd_a4mp);
|
||||
rmobile_init_pm_domain(&sh7372_pd_d4);
|
||||
rmobile_init_pm_domain(&sh7372_pd_a4r);
|
||||
rmobile_init_pm_domain(&sh7372_pd_a3rv);
|
||||
rmobile_init_pm_domain(&sh7372_pd_a3ri);
|
||||
rmobile_init_pm_domain(&sh7372_pd_a4s);
|
||||
rmobile_init_pm_domain(&sh7372_pd_a3sp);
|
||||
rmobile_init_pm_domain(&sh7372_pd_a3sg);
|
||||
struct pm_domain_device domain_devices[] = {
|
||||
{ "A3RV", &vpu_device, },
|
||||
{ "A4MP", &spu0_device, },
|
||||
{ "A4MP", &spu1_device, },
|
||||
{ "A3SP", &scif0_device, },
|
||||
{ "A3SP", &scif1_device, },
|
||||
{ "A3SP", &scif2_device, },
|
||||
{ "A3SP", &scif3_device, },
|
||||
{ "A3SP", &scif4_device, },
|
||||
{ "A3SP", &scif5_device, },
|
||||
{ "A3SP", &scif6_device, },
|
||||
{ "A3SP", &iic1_device, },
|
||||
{ "A3SP", &dma0_device, },
|
||||
{ "A3SP", &dma1_device, },
|
||||
{ "A3SP", &dma2_device, },
|
||||
{ "A3SP", &usb_dma0_device, },
|
||||
{ "A3SP", &usb_dma1_device, },
|
||||
{ "A4R", &iic0_device, },
|
||||
{ "A4R", &veu0_device, },
|
||||
{ "A4R", &veu1_device, },
|
||||
{ "A4R", &veu2_device, },
|
||||
{ "A4R", &veu3_device, },
|
||||
{ "A4R", &jpu_device, },
|
||||
{ "A4R", &tmu00_device, },
|
||||
{ "A4R", &tmu01_device, },
|
||||
};
|
||||
|
||||
rmobile_pm_add_subdomain(&sh7372_pd_a4lc, &sh7372_pd_a3rv);
|
||||
rmobile_pm_add_subdomain(&sh7372_pd_a4r, &sh7372_pd_a4lc);
|
||||
|
||||
rmobile_pm_add_subdomain(&sh7372_pd_a4s, &sh7372_pd_a3sg);
|
||||
rmobile_pm_add_subdomain(&sh7372_pd_a4s, &sh7372_pd_a3sp);
|
||||
sh7372_init_pm_domains();
|
||||
|
||||
platform_add_devices(sh7372_early_devices,
|
||||
ARRAY_SIZE(sh7372_early_devices));
|
||||
@ -1023,30 +1036,8 @@ void __init sh7372_add_standard_devices(void)
|
||||
platform_add_devices(sh7372_late_devices,
|
||||
ARRAY_SIZE(sh7372_late_devices));
|
||||
|
||||
rmobile_add_device_to_domain(&sh7372_pd_a3rv, &vpu_device);
|
||||
rmobile_add_device_to_domain(&sh7372_pd_a4mp, &spu0_device);
|
||||
rmobile_add_device_to_domain(&sh7372_pd_a4mp, &spu1_device);
|
||||
rmobile_add_device_to_domain(&sh7372_pd_a3sp, &scif0_device);
|
||||
rmobile_add_device_to_domain(&sh7372_pd_a3sp, &scif1_device);
|
||||
rmobile_add_device_to_domain(&sh7372_pd_a3sp, &scif2_device);
|
||||
rmobile_add_device_to_domain(&sh7372_pd_a3sp, &scif3_device);
|
||||
rmobile_add_device_to_domain(&sh7372_pd_a3sp, &scif4_device);
|
||||
rmobile_add_device_to_domain(&sh7372_pd_a3sp, &scif5_device);
|
||||
rmobile_add_device_to_domain(&sh7372_pd_a3sp, &scif6_device);
|
||||
rmobile_add_device_to_domain(&sh7372_pd_a3sp, &iic1_device);
|
||||
rmobile_add_device_to_domain(&sh7372_pd_a3sp, &dma0_device);
|
||||
rmobile_add_device_to_domain(&sh7372_pd_a3sp, &dma1_device);
|
||||
rmobile_add_device_to_domain(&sh7372_pd_a3sp, &dma2_device);
|
||||
rmobile_add_device_to_domain(&sh7372_pd_a3sp, &usb_dma0_device);
|
||||
rmobile_add_device_to_domain(&sh7372_pd_a3sp, &usb_dma1_device);
|
||||
rmobile_add_device_to_domain(&sh7372_pd_a4r, &iic0_device);
|
||||
rmobile_add_device_to_domain(&sh7372_pd_a4r, &veu0_device);
|
||||
rmobile_add_device_to_domain(&sh7372_pd_a4r, &veu1_device);
|
||||
rmobile_add_device_to_domain(&sh7372_pd_a4r, &veu2_device);
|
||||
rmobile_add_device_to_domain(&sh7372_pd_a4r, &veu3_device);
|
||||
rmobile_add_device_to_domain(&sh7372_pd_a4r, &jpu_device);
|
||||
rmobile_add_device_to_domain(&sh7372_pd_a4r, &tmu00_device);
|
||||
rmobile_add_device_to_domain(&sh7372_pd_a4r, &tmu01_device);
|
||||
rmobile_add_devices_to_domains(domain_devices,
|
||||
ARRAY_SIZE(domain_devices));
|
||||
}
|
||||
|
||||
static void __init sh7372_earlytimer_init(void)
|
||||
|
Loading…
Reference in New Issue
Block a user