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OMAP: McBSP: implement McBSP CLKR and FSR signal muxing via mach-omap2/mcbsp.c
The OMAP ASoC McBSP code implemented CLKR and FSR signal muxing via direct System Control Module writes on OMAP2+. This required the omap_ctrl_{read,write}l() functions to be exported, which is against policy: the only code that should call those functions directly is OMAP core code, not device drivers. omap_ctrl_{read,write}*() are no longer exported, so the driver no longer builds as a module. Fix the pinmuxing part of the problem by removing calls to omap_ctrl_{read,write}l() from the OMAP ASoC McBSP code and implementing signal muxing functions in arch/arm/mach-omap2/mcbsp.c. Due to the unfortunate way that McBSP support is implemented in ASoC and the OMAP tree, these symbols must be exported for use by sound/soc/omap/omap-mcbsp.c. Going forward, the McBSP device driver should be moved from arch/arm/*omap* into drivers/ or sound/soc/*, and the CPU DAI driver should be implemented as a platform_driver as many other ASoC CPU DAI drivers are. These two steps should resolve many of the layering problems, which will rapidly reappear during a McBSP hwmod/PM runtime conversion. Signed-off-by: Paul Walmsley <paul@pwsan.com> Acked-by: Jarkko Nikula <jhnikula@gmail.com> Acked-by: Peter Ujfalusi <peter.ujfalusi@nokia.com> Acked-by: Liam Girdwood <lrg@slimlogic.co.uk> Acked-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
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@ -22,7 +22,37 @@
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#include <plat/dma.h>
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#include <plat/cpu.h>
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#include <plat/mcbsp.h>
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#include <plat/control.h>
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/* McBSP internal signal muxing functions */
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void omap2_mcbsp1_mux_clkr_src(u8 mux)
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{
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u32 v;
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v = omap_ctrl_readl(OMAP2_CONTROL_DEVCONF0);
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if (mux == CLKR_SRC_CLKR)
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v &= OMAP2_MCBSP1_CLKR_MASK;
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else if (mux == CLKR_SRC_CLKX)
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v |= OMAP2_MCBSP1_CLKR_MASK;
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omap_ctrl_writel(v, OMAP2_CONTROL_DEVCONF0);
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}
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EXPORT_SYMBOL(omap2_mcbsp1_mux_clkr_src);
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void omap2_mcbsp1_mux_fsr_src(u8 mux)
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{
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u32 v;
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v = omap_ctrl_readl(OMAP2_CONTROL_DEVCONF0);
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if (mux == FSR_SRC_FSR)
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v &= OMAP2_MCBSP1_FSR_MASK;
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else if (mux == FSR_SRC_FSX)
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v |= OMAP2_MCBSP1_FSR_MASK;
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omap_ctrl_writel(v, OMAP2_CONTROL_DEVCONF0);
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}
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EXPORT_SYMBOL(omap2_mcbsp1_mux_fsr_src);
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/* Platform data */
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#ifdef CONFIG_ARCH_OMAP2420
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static struct omap_mcbsp_platform_data omap2420_mcbsp_pdata[] = {
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@ -223,6 +223,8 @@
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#define OMAP2_MMCSDIO1ADPCLKISEL (1 << 24) /* MMC1 loop back clock */
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#define OMAP24XX_USBSTANDBYCTRL (1 << 15)
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#define OMAP2_MCBSP2_CLKS_MASK (1 << 6)
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#define OMAP2_MCBSP1_FSR_MASK (1 << 4)
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#define OMAP2_MCBSP1_CLKR_MASK (1 << 3)
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#define OMAP2_MCBSP1_CLKS_MASK (1 << 2)
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/* CONTROL_DEVCONF1 bits */
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@ -312,6 +312,14 @@
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#define RFSREN 0x0002
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#define RSYNCERREN 0x0001
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/* CLKR signal muxing options */
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#define CLKR_SRC_CLKR 0
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#define CLKR_SRC_CLKX 1
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/* FSR signal muxing options */
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#define FSR_SRC_FSR 0
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#define FSR_SRC_FSX 1
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/* we don't do multichannel for now */
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struct omap_mcbsp_reg_cfg {
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u16 spcr2;
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@ -501,7 +509,6 @@ int omap_mcbsp_recv_buffer(unsigned int id, dma_addr_t buffer, unsigned int leng
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int omap_mcbsp_spi_master_xmit_word_poll(unsigned int id, u32 word);
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int omap_mcbsp_spi_master_recv_word_poll(unsigned int id, u32 * word);
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/* SPI specific API */
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void omap_mcbsp_set_spi_mode(unsigned int id, const struct omap_mcbsp_spi_cfg * spi_cfg);
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@ -510,6 +517,10 @@ int omap_mcbsp_pollread(unsigned int id, u16 * buf);
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int omap_mcbsp_pollwrite(unsigned int id, u16 buf);
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int omap_mcbsp_set_io_type(unsigned int id, omap_mcbsp_io_type_t io_type);
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/* McBSP signal muxing API */
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void omap2_mcbsp1_mux_clkr_src(u8 mux);
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void omap2_mcbsp1_mux_fsr_src(u8 mux);
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#ifdef CONFIG_ARCH_OMAP3
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/* Sidetone specific API */
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int omap_st_set_chgain(unsigned int id, int channel, s16 chgain);
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@ -27,6 +27,7 @@
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#include <plat/dma.h>
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#include <plat/mcbsp.h>
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#include <plat/control.h>
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#include "../mach-omap2/cm-regbits-34xx.h"
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@ -661,48 +661,23 @@ static int omap_mcbsp_dai_set_clks_src(struct omap_mcbsp_data *mcbsp_data,
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return 0;
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}
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static int omap_mcbsp_dai_set_rcvr_src(struct omap_mcbsp_data *mcbsp_data,
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int clk_id)
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{
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int sel_bit, set = 0;
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u16 reg = OMAP2_CONTROL_DEVCONF0;
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if (cpu_class_is_omap1())
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return -EINVAL; /* TODO: Can this be implemented for OMAP1? */
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if (mcbsp_data->bus_id != 0)
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return -EINVAL;
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switch (clk_id) {
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case OMAP_MCBSP_CLKR_SRC_CLKX:
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set = 1;
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case OMAP_MCBSP_CLKR_SRC_CLKR:
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sel_bit = 3;
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break;
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case OMAP_MCBSP_FSR_SRC_FSX:
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set = 1;
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case OMAP_MCBSP_FSR_SRC_FSR:
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sel_bit = 4;
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break;
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default:
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return -EINVAL;
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}
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if (set)
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omap_ctrl_writel(omap_ctrl_readl(reg) | (1 << sel_bit), reg);
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else
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omap_ctrl_writel(omap_ctrl_readl(reg) & ~(1 << sel_bit), reg);
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return 0;
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}
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static int omap_mcbsp_dai_set_dai_sysclk(struct snd_soc_dai *cpu_dai,
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int clk_id, unsigned int freq,
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int dir)
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{
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struct omap_mcbsp_data *mcbsp_data = to_mcbsp(cpu_dai->private_data);
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struct omap_mcbsp_reg_cfg *regs = &mcbsp_data->regs;
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struct omap_mcbsp_platform_data *pdata = cpu_dai->dev->platform_data;
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int err = 0;
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/* The McBSP signal muxing functions are only available on McBSP1 */
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if (clk_id == OMAP_MCBSP_CLKR_SRC_CLKR ||
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clk_id == OMAP_MCBSP_CLKR_SRC_CLKX ||
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clk_id == OMAP_MCBSP_FSR_SRC_FSR ||
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clk_id == OMAP_MCBSP_FSR_SRC_FSX)
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if (cpu_class_is_omap1() || mcbsp_data->bus_id != 0)
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return -EINVAL;
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mcbsp_data->in_freq = freq;
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switch (clk_id) {
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@ -720,11 +695,18 @@ static int omap_mcbsp_dai_set_dai_sysclk(struct snd_soc_dai *cpu_dai,
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regs->pcr0 |= SCLKME;
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break;
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case OMAP_MCBSP_CLKR_SRC_CLKR:
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omap2_mcbsp1_mux_clkr_src(CLKR_SRC_CLKR);
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break;
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case OMAP_MCBSP_CLKR_SRC_CLKX:
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omap2_mcbsp1_mux_clkr_src(CLKR_SRC_CLKX);
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break;
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case OMAP_MCBSP_FSR_SRC_FSR:
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omap2_mcbsp1_mux_fsr_src(FSR_SRC_FSR);
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break;
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case OMAP_MCBSP_FSR_SRC_FSX:
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err = omap_mcbsp_dai_set_rcvr_src(mcbsp_data, clk_id);
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omap2_mcbsp1_mux_fsr_src(FSR_SRC_FSX);
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break;
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default:
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err = -ENODEV;
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