PCI: imx6: Do not hide PHY driver callbacks and refine the error handling

Move the phy_power_on() to host_init from imx6_pcie_clk_enable().

Move the phy_init() to host_init from imx6_pcie_deassert_core_reset().

Refine the error handling in imx6_pcie_host_init() accordingly.

Link: https://lore.kernel.org/r/1657783869-19194-15-git-send-email-hongxing.zhu@nxp.com
Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
This commit is contained in:
Richard Zhu 2022-07-14 15:31:06 +08:00 committed by Bjorn Helgaas
parent af48f8226e
commit cf236e0c0d

View File

@ -639,14 +639,6 @@ static int imx6_pcie_clk_enable(struct imx6_pcie *imx6_pcie)
goto err_ref_clk; goto err_ref_clk;
} }
switch (imx6_pcie->drvdata->variant) {
case IMX8MM:
if (phy_power_on(imx6_pcie->phy))
dev_err(dev, "unable to power on PHY\n");
break;
default:
break;
}
/* allow the clocks to stabilize */ /* allow the clocks to stabilize */
usleep_range(200, 500); usleep_range(200, 500);
return 0; return 0;
@ -723,10 +715,6 @@ static int imx6_pcie_deassert_core_reset(struct imx6_pcie *imx6_pcie)
case IMX8MQ: case IMX8MQ:
reset_control_deassert(imx6_pcie->pciephy_reset); reset_control_deassert(imx6_pcie->pciephy_reset);
break; break;
case IMX8MM:
if (phy_init(imx6_pcie->phy))
dev_err(dev, "waiting for phy ready timeout!\n");
break;
case IMX7D: case IMX7D:
reset_control_deassert(imx6_pcie->pciephy_reset); reset_control_deassert(imx6_pcie->pciephy_reset);
@ -762,6 +750,7 @@ static int imx6_pcie_deassert_core_reset(struct imx6_pcie *imx6_pcie)
usleep_range(200, 500); usleep_range(200, 500);
break; break;
case IMX6Q: /* Nothing to do */ case IMX6Q: /* Nothing to do */
case IMX8MM:
break; break;
} }
@ -914,16 +903,37 @@ static int imx6_pcie_host_init(struct dw_pcie_rp *pp)
imx6_pcie_assert_core_reset(imx6_pcie); imx6_pcie_assert_core_reset(imx6_pcie);
imx6_pcie_init_phy(imx6_pcie); imx6_pcie_init_phy(imx6_pcie);
if (imx6_pcie->phy) {
ret = phy_power_on(imx6_pcie->phy);
if (ret) {
dev_err(dev, "pcie PHY power up failed\n");
goto err_reg_disable;
}
}
ret = imx6_pcie_deassert_core_reset(imx6_pcie); ret = imx6_pcie_deassert_core_reset(imx6_pcie);
if (ret < 0) { if (ret < 0) {
dev_err(dev, "pcie deassert core reset failed: %d\n", ret); dev_err(dev, "pcie deassert core reset failed: %d\n", ret);
goto err_reg_disable; goto err_phy_off;
} }
if (imx6_pcie->phy) {
ret = phy_init(imx6_pcie->phy);
if (ret) {
dev_err(dev, "waiting for PHY ready timeout!\n");
goto err_clk_disable;
}
}
imx6_setup_phy_mpll(imx6_pcie); imx6_setup_phy_mpll(imx6_pcie);
return 0; return 0;
err_clk_disable:
imx6_pcie_clk_disable(imx6_pcie);
err_phy_off:
if (imx6_pcie->phy)
phy_power_off(imx6_pcie->phy);
err_reg_disable: err_reg_disable:
if (imx6_pcie->vpcie) if (imx6_pcie->vpcie)
regulator_disable(imx6_pcie->vpcie); regulator_disable(imx6_pcie->vpcie);