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Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/roland/infiniband
* 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/roland/infiniband: IB/ipath: tidy up white space in a few files IB/ipath: fix label name in interrupt handler IB/ipath: improve sparse annotation IB/ipath: simplify IB timer usage IB/ipath: simplify RC send posting IB/ipath: prevent hardware from being accessed during reset IB/ipath: fix verbs registration IB/ipath: change handling of PIO buffers IB/ipath: iterate over correct number of ports during reset IB/ipath: set up 32-bit DMA mask if 64-bit setup fails IB/ipath: fix race with exposing reset file IB/mthca: Fix offset in query_gid method
This commit is contained in:
commit
cf105601df
@ -60,11 +60,11 @@
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#define __IPATH_KERNEL_SEND 0x2000 /* use kernel mode send */
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#define __IPATH_EPKTDBG 0x4000 /* print ethernet packet data */
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#define __IPATH_SMADBG 0x8000 /* sma packet debug */
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#define __IPATH_IPATHDBG 0x10000 /* Ethernet (IPATH) general debug on */
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#define __IPATH_IPATHWARN 0x20000 /* Ethernet (IPATH) warnings on */
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#define __IPATH_IPATHERR 0x40000 /* Ethernet (IPATH) errors on */
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#define __IPATH_IPATHPD 0x80000 /* Ethernet (IPATH) packet dump on */
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#define __IPATH_IPATHTABLE 0x100000 /* Ethernet (IPATH) table dump on */
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#define __IPATH_IPATHDBG 0x10000 /* Ethernet (IPATH) gen debug */
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#define __IPATH_IPATHWARN 0x20000 /* Ethernet (IPATH) warnings */
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#define __IPATH_IPATHERR 0x40000 /* Ethernet (IPATH) errors */
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#define __IPATH_IPATHPD 0x80000 /* Ethernet (IPATH) packet dump */
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#define __IPATH_IPATHTABLE 0x100000 /* Ethernet (IPATH) table dump */
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#else /* _IPATH_DEBUGGING */
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@ -79,11 +79,12 @@
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#define __IPATH_TRSAMPLE 0x0 /* generate trace buffer sample entries */
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#define __IPATH_VERBDBG 0x0 /* very verbose debug */
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#define __IPATH_PKTDBG 0x0 /* print packet data */
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#define __IPATH_PROCDBG 0x0 /* print process startup (init)/exit messages */
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#define __IPATH_PROCDBG 0x0 /* process startup (init)/exit messages */
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/* print mmap/nopage stuff, not using VDBG any more */
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#define __IPATH_MMDBG 0x0
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#define __IPATH_EPKTDBG 0x0 /* print ethernet packet data */
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#define __IPATH_SMADBG 0x0 /* print process startup (init)/exit messages */#define __IPATH_IPATHDBG 0x0 /* Ethernet (IPATH) table dump on */
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#define __IPATH_SMADBG 0x0 /* process startup (init)/exit messages */
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#define __IPATH_IPATHDBG 0x0 /* Ethernet (IPATH) table dump on */
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#define __IPATH_IPATHWARN 0x0 /* Ethernet (IPATH) warnings on */
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#define __IPATH_IPATHERR 0x0 /* Ethernet (IPATH) errors on */
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#define __IPATH_IPATHPD 0x0 /* Ethernet (IPATH) packet dump on */
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@ -277,13 +277,14 @@ static int ipath_diag_open(struct inode *in, struct file *fp)
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bail:
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spin_unlock_irqrestore(&ipath_devs_lock, flags);
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mutex_unlock(&ipath_mutex);
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/* Only expose a way to reset the device if we
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make it into diag mode. */
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if (ret == 0)
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ipath_expose_reset(&dd->pcidev->dev);
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mutex_unlock(&ipath_mutex);
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return ret;
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}
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@ -417,11 +417,21 @@ static int __devinit ipath_init_one(struct pci_dev *pdev,
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}
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ret = pci_set_dma_mask(pdev, DMA_64BIT_MASK);
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if (ret) {
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/*
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* if the 64 bit setup fails, try 32 bit. Some systems
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* do not setup 64 bit maps on systems with 2GB or less
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* memory installed.
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*/
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ret = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
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if (ret) {
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dev_info(&pdev->dev, "pci_set_dma_mask unit %u "
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"fails: %d\n", dd->ipath_unit, ret);
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goto bail_regions;
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}
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else
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ipath_dbg("No 64bit DMA mask, used 32 bit mask\n");
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}
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pci_set_master(pdev);
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@ -1949,7 +1959,7 @@ int ipath_reset_device(int unit)
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}
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if (dd->ipath_pd)
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for (i = 1; i < dd->ipath_portcnt; i++) {
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for (i = 1; i < dd->ipath_cfgports; i++) {
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if (dd->ipath_pd[i] && dd->ipath_pd[i]->port_cnt) {
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ipath_dbg("unit %u port %d is in use "
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"(PID %u cmd %s), can't reset\n",
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@ -53,13 +53,19 @@ MODULE_PARM_DESC(cfgports, "Set max number of ports to use");
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/*
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* Number of buffers reserved for driver (layered drivers and SMA
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* send). Reserved at end of buffer list.
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* send). Reserved at end of buffer list. Initialized based on
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* number of PIO buffers if not set via module interface.
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* The problem with this is that it's global, but we'll use different
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* numbers for different chip types. So the default value is not
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* very useful. I've redefined it for the 1.3 release so that it's
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* zero unless set by the user to something else, in which case we
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* try to respect it.
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*/
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static ushort ipath_kpiobufs = 32;
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static ushort ipath_kpiobufs;
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static int ipath_set_kpiobufs(const char *val, struct kernel_param *kp);
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module_param_call(kpiobufs, ipath_set_kpiobufs, param_get_uint,
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module_param_call(kpiobufs, ipath_set_kpiobufs, param_get_ushort,
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&ipath_kpiobufs, S_IWUSR | S_IRUGO);
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MODULE_PARM_DESC(kpiobufs, "Set number of PIO buffers for driver");
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@ -531,8 +537,11 @@ static int init_housekeeping(struct ipath_devdata *dd,
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* Don't clear ipath_flags as 8bit mode was set before
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* entering this func. However, we do set the linkstate to
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* unknown, so we can watch for a transition.
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* PRESENT is set because we want register reads to work,
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* and the kernel infrastructure saw it in config space;
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* We clear it if we have failures.
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*/
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dd->ipath_flags |= IPATH_LINKUNK;
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dd->ipath_flags |= IPATH_LINKUNK | IPATH_PRESENT;
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dd->ipath_flags &= ~(IPATH_LINKACTIVE | IPATH_LINKARMED |
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IPATH_LINKDOWN | IPATH_LINKINIT);
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@ -560,6 +569,7 @@ static int init_housekeeping(struct ipath_devdata *dd,
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|| (dd->ipath_uregbase & 0xffffffff) == 0xffffffff) {
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ipath_dev_err(dd, "Register read failures from chip, "
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"giving up initialization\n");
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dd->ipath_flags &= ~IPATH_PRESENT;
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ret = -ENODEV;
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goto done;
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}
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@ -682,16 +692,14 @@ int ipath_init_chip(struct ipath_devdata *dd, int reinit)
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*/
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dd->ipath_pioavregs = ALIGN(val, sizeof(u64) * BITS_PER_BYTE / 2)
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/ (sizeof(u64) * BITS_PER_BYTE / 2);
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if (!ipath_kpiobufs) /* have to have at least 1, for SMA */
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kpiobufs = ipath_kpiobufs = 1;
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else if ((dd->ipath_piobcnt2k + dd->ipath_piobcnt4k) <
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(dd->ipath_cfgports * IPATH_MIN_USER_PORT_BUFCNT)) {
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dev_info(&dd->pcidev->dev, "Too few PIO buffers (%u) "
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"for %u ports to have %u each!\n",
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dd->ipath_piobcnt2k + dd->ipath_piobcnt4k,
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dd->ipath_cfgports, IPATH_MIN_USER_PORT_BUFCNT);
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kpiobufs = 1; /* reserve just the minimum for SMA/ether */
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} else
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if (ipath_kpiobufs == 0) {
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/* not set by user, or set explictly to default */
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if ((dd->ipath_piobcnt2k + dd->ipath_piobcnt4k) > 128)
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kpiobufs = 32;
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else
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kpiobufs = 16;
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}
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else
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kpiobufs = ipath_kpiobufs;
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if (kpiobufs >
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@ -665,14 +665,14 @@ static void handle_layer_pioavail(struct ipath_devdata *dd)
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ret = __ipath_layer_intr(dd, IPATH_LAYER_INT_SEND_CONTINUE);
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if (ret > 0)
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goto clear;
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goto set;
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ret = __ipath_verbs_piobufavail(dd);
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if (ret > 0)
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goto clear;
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goto set;
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return;
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clear:
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set:
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set_bit(IPATH_S_PIOINTBUFAVAIL, &dd->ipath_sendctrl);
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ipath_write_kreg(dd, dd->ipath_kregs->kr_sendctrl,
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dd->ipath_sendctrl);
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@ -719,11 +719,24 @@ static void handle_rcv(struct ipath_devdata *dd, u32 istat)
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irqreturn_t ipath_intr(int irq, void *data, struct pt_regs *regs)
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{
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struct ipath_devdata *dd = data;
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u32 istat = ipath_read_kreg32(dd, dd->ipath_kregs->kr_intstatus);
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u32 istat;
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ipath_err_t estat = 0;
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static unsigned unexpected = 0;
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irqreturn_t ret;
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if(!(dd->ipath_flags & IPATH_PRESENT)) {
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/* this is mostly so we don't try to touch the chip while
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* it is being reset */
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/*
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* This return value is perhaps odd, but we do not want the
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* interrupt core code to remove our interrupt handler
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* because we don't appear to be handling an interrupt
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* during a chip reset.
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*/
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return IRQ_HANDLED;
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}
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istat = ipath_read_kreg32(dd, dd->ipath_kregs->kr_intstatus);
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if (unlikely(!istat)) {
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ipath_stats.sps_nullintr++;
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ret = IRQ_NONE; /* not our interrupt, or already handled */
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@ -731,7 +731,7 @@ u64 ipath_read_kreg64_port(const struct ipath_devdata *, ipath_kreg,
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static inline u32 ipath_read_ureg32(const struct ipath_devdata *dd,
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ipath_ureg regno, int port)
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{
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if (!dd->ipath_kregbase)
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if (!dd->ipath_kregbase || !(dd->ipath_flags & IPATH_PRESENT))
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return 0;
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return readl(regno + (u64 __iomem *)
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@ -762,7 +762,7 @@ static inline void ipath_write_ureg(const struct ipath_devdata *dd,
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static inline u32 ipath_read_kreg32(const struct ipath_devdata *dd,
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ipath_kreg regno)
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{
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if (!dd->ipath_kregbase)
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if (!dd->ipath_kregbase || !(dd->ipath_flags & IPATH_PRESENT))
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return -1;
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return readl((u32 __iomem *) & dd->ipath_kregbase[regno]);
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}
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@ -770,7 +770,7 @@ static inline u32 ipath_read_kreg32(const struct ipath_devdata *dd,
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static inline u64 ipath_read_kreg64(const struct ipath_devdata *dd,
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ipath_kreg regno)
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{
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if (!dd->ipath_kregbase)
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if (!dd->ipath_kregbase || !(dd->ipath_flags & IPATH_PRESENT))
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return -1;
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return readq(&dd->ipath_kregbase[regno]);
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@ -786,7 +786,7 @@ static inline void ipath_write_kreg(const struct ipath_devdata *dd,
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static inline u64 ipath_read_creg(const struct ipath_devdata *dd,
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ipath_sreg regno)
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{
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if (!dd->ipath_kregbase)
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if (!dd->ipath_kregbase || !(dd->ipath_flags & IPATH_PRESENT))
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return 0;
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return readq(regno + (u64 __iomem *)
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@ -797,7 +797,7 @@ static inline u64 ipath_read_creg(const struct ipath_devdata *dd,
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static inline u32 ipath_read_creg32(const struct ipath_devdata *dd,
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ipath_sreg regno)
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{
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if (!dd->ipath_kregbase)
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if (!dd->ipath_kregbase || !(dd->ipath_flags & IPATH_PRESENT))
|
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return 0;
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return readl(regno + (u64 __iomem *)
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(dd->ipath_cregbase +
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|
@ -46,13 +46,15 @@
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/* Acquire before ipath_devs_lock. */
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static DEFINE_MUTEX(ipath_layer_mutex);
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static int ipath_verbs_registered;
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|
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u16 ipath_layer_rcv_opcode;
|
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|
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static int (*layer_intr)(void *, u32);
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static int (*layer_rcv)(void *, void *, struct sk_buff *);
|
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static int (*layer_rcv_lid)(void *, void *);
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static int (*verbs_piobufavail)(void *);
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static void (*verbs_rcv)(void *, void *, void *, u32);
|
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static int ipath_verbs_registered;
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|
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static void *(*layer_add_one)(int, struct ipath_devdata *);
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static void (*layer_remove_one)(void *);
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@ -586,6 +588,8 @@ void ipath_verbs_unregister(void)
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verbs_rcv = NULL;
|
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verbs_timer_cb = NULL;
|
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|
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ipath_verbs_registered = 0;
|
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|
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mutex_unlock(&ipath_layer_mutex);
|
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}
|
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|
||||
|
@ -972,6 +972,8 @@ static int ipath_setup_pe_reset(struct ipath_devdata *dd)
|
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/* Use ERROR so it shows up in logs, etc. */
|
||||
ipath_dev_err(dd, "Resetting PE-800 unit %u\n",
|
||||
dd->ipath_unit);
|
||||
/* keep chip from being accessed in a few places */
|
||||
dd->ipath_flags &= ~(IPATH_INITTED|IPATH_PRESENT);
|
||||
val = dd->ipath_control | INFINIPATH_C_RESET;
|
||||
ipath_write_kreg(dd, dd->ipath_kregs->kr_control, val);
|
||||
mb();
|
||||
@ -997,6 +999,8 @@ static int ipath_setup_pe_reset(struct ipath_devdata *dd)
|
||||
if ((r = pci_enable_device(dd->pcidev)))
|
||||
ipath_dev_err(dd, "pci_enable_device failed after "
|
||||
"reset: %d\n", r);
|
||||
/* whether it worked or not, mark as present, again */
|
||||
dd->ipath_flags |= IPATH_PRESENT;
|
||||
val = ipath_read_kreg64(dd, dd->ipath_kregs->kr_revision);
|
||||
if (val == dd->ipath_revision) {
|
||||
ipath_cdbg(VERBOSE, "Got matching revision "
|
||||
|
@ -34,8 +34,9 @@
|
||||
#define _IPATH_REGISTERS_H
|
||||
|
||||
/*
|
||||
* This file should only be included by kernel source, and by the diags.
|
||||
* It defines the registers, and their contents, for the InfiniPath HT-400 chip
|
||||
* This file should only be included by kernel source, and by the diags. It
|
||||
* defines the registers, and their contents, for the InfiniPath HT-400
|
||||
* chip.
|
||||
*/
|
||||
|
||||
/*
|
||||
@ -156,8 +157,10 @@
|
||||
#define INFINIPATH_IBCC_FLOWCTRLWATERMARK_SHIFT 8
|
||||
#define INFINIPATH_IBCC_LINKINITCMD_MASK 0x3ULL
|
||||
#define INFINIPATH_IBCC_LINKINITCMD_DISABLE 1
|
||||
#define INFINIPATH_IBCC_LINKINITCMD_POLL 2 /* cycle through TS1/TS2 till OK */
|
||||
#define INFINIPATH_IBCC_LINKINITCMD_SLEEP 3 /* wait for TS1, then go on */
|
||||
/* cycle through TS1/TS2 till OK */
|
||||
#define INFINIPATH_IBCC_LINKINITCMD_POLL 2
|
||||
/* wait for TS1, then go on */
|
||||
#define INFINIPATH_IBCC_LINKINITCMD_SLEEP 3
|
||||
#define INFINIPATH_IBCC_LINKINITCMD_SHIFT 16
|
||||
#define INFINIPATH_IBCC_LINKCMD_MASK 0x3ULL
|
||||
#define INFINIPATH_IBCC_LINKCMD_INIT 1 /* move to 0x11 */
|
||||
@ -182,7 +185,8 @@
|
||||
#define INFINIPATH_IBCS_LINKSTATE_SHIFT 4
|
||||
#define INFINIPATH_IBCS_TXREADY 0x40000000
|
||||
#define INFINIPATH_IBCS_TXCREDITOK 0x80000000
|
||||
/* link training states (shift by INFINIPATH_IBCS_LINKTRAININGSTATE_SHIFT) */
|
||||
/* link training states (shift by
|
||||
INFINIPATH_IBCS_LINKTRAININGSTATE_SHIFT) */
|
||||
#define INFINIPATH_IBCS_LT_STATE_DISABLED 0x00
|
||||
#define INFINIPATH_IBCS_LT_STATE_LINKUP 0x01
|
||||
#define INFINIPATH_IBCS_LT_STATE_POLLACTIVE 0x02
|
||||
@ -267,10 +271,12 @@
|
||||
/* kr_serdesconfig0 bits */
|
||||
#define INFINIPATH_SERDC0_RESET_MASK 0xfULL /* overal reset bits */
|
||||
#define INFINIPATH_SERDC0_RESET_PLL 0x10000000ULL /* pll reset */
|
||||
#define INFINIPATH_SERDC0_TXIDLE 0xF000ULL /* tx idle enables (per lane) */
|
||||
#define INFINIPATH_SERDC0_RXDETECT_EN 0xF0000ULL /* rx detect enables (per lane) */
|
||||
#define INFINIPATH_SERDC0_L1PWR_DN 0xF0ULL /* L1 Power down; use with RXDETECT,
|
||||
Otherwise not used on IB side */
|
||||
/* tx idle enables (per lane) */
|
||||
#define INFINIPATH_SERDC0_TXIDLE 0xF000ULL
|
||||
/* rx detect enables (per lane) */
|
||||
#define INFINIPATH_SERDC0_RXDETECT_EN 0xF0000ULL
|
||||
/* L1 Power down; use with RXDETECT, Otherwise not used on IB side */
|
||||
#define INFINIPATH_SERDC0_L1PWR_DN 0xF0ULL
|
||||
|
||||
/* kr_xgxsconfig bits */
|
||||
#define INFINIPATH_XGXS_RESET 0x7ULL
|
||||
@ -390,12 +396,13 @@ struct ipath_kregs {
|
||||
ipath_kreg kr_txintmemsize;
|
||||
ipath_kreg kr_xgxsconfig;
|
||||
ipath_kreg kr_ibpllcfg;
|
||||
/* use these two (and the following N ports) only with ipath_k*_kreg64_port();
|
||||
* not *kreg64() */
|
||||
/* use these two (and the following N ports) only with
|
||||
* ipath_k*_kreg64_port(); not *kreg64() */
|
||||
ipath_kreg kr_rcvhdraddr;
|
||||
ipath_kreg kr_rcvhdrtailaddr;
|
||||
|
||||
/* remaining registers are not present on all types of infinipath chips */
|
||||
/* remaining registers are not present on all types of infinipath
|
||||
chips */
|
||||
ipath_kreg kr_rcvpktledcnt;
|
||||
ipath_kreg kr_pcierbuftestreg0;
|
||||
ipath_kreg kr_pcierbuftestreg1;
|
||||
|
@ -531,19 +531,12 @@ int ipath_post_rc_send(struct ipath_qp *qp, struct ib_send_wr *wr)
|
||||
}
|
||||
wqe->wr.num_sge = j;
|
||||
qp->s_head = next;
|
||||
/*
|
||||
* Wake up the send tasklet if the QP is not waiting
|
||||
* for an RNR timeout.
|
||||
*/
|
||||
next = qp->s_rnr_timeout;
|
||||
spin_unlock_irqrestore(&qp->s_lock, flags);
|
||||
|
||||
if (next == 0) {
|
||||
if (qp->ibqp.qp_type == IB_QPT_UC)
|
||||
ipath_do_uc_send((unsigned long) qp);
|
||||
else
|
||||
ipath_do_rc_send((unsigned long) qp);
|
||||
}
|
||||
|
||||
ret = 0;
|
||||
|
||||
|
@ -711,10 +711,22 @@ static struct attribute_group dev_attr_group = {
|
||||
* enters diag mode. A device reset is quite likely to crash the
|
||||
* machine entirely, so we don't want to normally make it
|
||||
* available.
|
||||
*
|
||||
* Called with ipath_mutex held.
|
||||
*/
|
||||
int ipath_expose_reset(struct device *dev)
|
||||
{
|
||||
return device_create_file(dev, &dev_attr_reset);
|
||||
static int exposed;
|
||||
int ret;
|
||||
|
||||
if (!exposed) {
|
||||
ret = device_create_file(dev, &dev_attr_reset);
|
||||
exposed = 1;
|
||||
}
|
||||
else
|
||||
ret = 0;
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
int ipath_driver_create_group(struct device_driver *drv)
|
||||
|
@ -46,8 +46,10 @@
|
||||
* This is called from ipath_post_ud_send() to forward a WQE addressed
|
||||
* to the same HCA.
|
||||
*/
|
||||
static void ipath_ud_loopback(struct ipath_qp *sqp, struct ipath_sge_state *ss,
|
||||
u32 length, struct ib_send_wr *wr, struct ib_wc *wc)
|
||||
static void ipath_ud_loopback(struct ipath_qp *sqp,
|
||||
struct ipath_sge_state *ss,
|
||||
u32 length, struct ib_send_wr *wr,
|
||||
struct ib_wc *wc)
|
||||
{
|
||||
struct ipath_ibdev *dev = to_idev(sqp->ibqp.device);
|
||||
struct ipath_qp *qp;
|
||||
|
@ -449,7 +449,6 @@ static void ipath_ib_timer(void *arg)
|
||||
{
|
||||
struct ipath_ibdev *dev = (struct ipath_ibdev *) arg;
|
||||
struct ipath_qp *resend = NULL;
|
||||
struct ipath_qp *rnr = NULL;
|
||||
struct list_head *last;
|
||||
struct ipath_qp *qp;
|
||||
unsigned long flags;
|
||||
@ -465,32 +464,18 @@ static void ipath_ib_timer(void *arg)
|
||||
last = &dev->pending[dev->pending_index];
|
||||
while (!list_empty(last)) {
|
||||
qp = list_entry(last->next, struct ipath_qp, timerwait);
|
||||
if (last->next == LIST_POISON1 ||
|
||||
last->next != &qp->timerwait ||
|
||||
qp->timerwait.prev != last) {
|
||||
INIT_LIST_HEAD(last);
|
||||
} else {
|
||||
list_del(&qp->timerwait);
|
||||
qp->timerwait.prev = (struct list_head *) resend;
|
||||
qp->timer_next = resend;
|
||||
resend = qp;
|
||||
atomic_inc(&qp->refcount);
|
||||
}
|
||||
}
|
||||
last = &dev->rnrwait;
|
||||
if (!list_empty(last)) {
|
||||
qp = list_entry(last->next, struct ipath_qp, timerwait);
|
||||
if (--qp->s_rnr_timeout == 0) {
|
||||
do {
|
||||
if (last->next == LIST_POISON1 ||
|
||||
last->next != &qp->timerwait ||
|
||||
qp->timerwait.prev != last) {
|
||||
INIT_LIST_HEAD(last);
|
||||
break;
|
||||
}
|
||||
list_del(&qp->timerwait);
|
||||
qp->timerwait.prev =
|
||||
(struct list_head *) rnr;
|
||||
rnr = qp;
|
||||
tasklet_hi_schedule(&qp->s_task);
|
||||
if (list_empty(last))
|
||||
break;
|
||||
qp = list_entry(last->next, struct ipath_qp,
|
||||
@ -530,8 +515,7 @@ static void ipath_ib_timer(void *arg)
|
||||
spin_unlock_irqrestore(&dev->pending_lock, flags);
|
||||
|
||||
/* XXX What if timer fires again while this is running? */
|
||||
for (qp = resend; qp != NULL;
|
||||
qp = (struct ipath_qp *) qp->timerwait.prev) {
|
||||
for (qp = resend; qp != NULL; qp = qp->timer_next) {
|
||||
struct ib_wc wc;
|
||||
|
||||
spin_lock_irqsave(&qp->s_lock, flags);
|
||||
@ -545,9 +529,6 @@ static void ipath_ib_timer(void *arg)
|
||||
if (atomic_dec_and_test(&qp->refcount))
|
||||
wake_up(&qp->wait);
|
||||
}
|
||||
for (qp = rnr; qp != NULL;
|
||||
qp = (struct ipath_qp *) qp->timerwait.prev)
|
||||
tasklet_hi_schedule(&qp->s_task);
|
||||
}
|
||||
|
||||
/**
|
||||
@ -556,9 +537,9 @@ static void ipath_ib_timer(void *arg)
|
||||
*
|
||||
* This is called from ipath_intr() at interrupt level when a PIO buffer is
|
||||
* available after ipath_verbs_send() returned an error that no buffers were
|
||||
* available. Return 0 if we consumed all the PIO buffers and we still have
|
||||
* available. Return 1 if we consumed all the PIO buffers and we still have
|
||||
* QPs waiting for buffers (for now, just do a tasklet_hi_schedule and
|
||||
* return one).
|
||||
* return zero).
|
||||
*/
|
||||
static int ipath_ib_piobufavail(void *arg)
|
||||
{
|
||||
@ -579,7 +560,7 @@ static int ipath_ib_piobufavail(void *arg)
|
||||
spin_unlock_irqrestore(&dev->pending_lock, flags);
|
||||
|
||||
bail:
|
||||
return 1;
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int ipath_query_device(struct ib_device *ibdev,
|
||||
@ -1159,7 +1140,7 @@ static ssize_t show_stats(struct class_device *cdev, char *buf)
|
||||
|
||||
len = sprintf(buf,
|
||||
"RC resends %d\n"
|
||||
"RC QACKs %d\n"
|
||||
"RC no QACK %d\n"
|
||||
"RC ACKs %d\n"
|
||||
"RC SEQ NAKs %d\n"
|
||||
"RC RDMA seq %d\n"
|
||||
|
@ -283,6 +283,7 @@ struct ipath_srq {
|
||||
struct ipath_qp {
|
||||
struct ib_qp ibqp;
|
||||
struct ipath_qp *next; /* link list for QPN hash table */
|
||||
struct ipath_qp *timer_next; /* link list for ipath_ib_timer() */
|
||||
struct list_head piowait; /* link for wait PIO buf */
|
||||
struct list_head timerwait; /* link for waiting for timeouts */
|
||||
struct ib_ah_attr remote_ah_attr;
|
||||
|
@ -95,7 +95,7 @@ struct ether_header {
|
||||
__u8 seq_num;
|
||||
__le32 len;
|
||||
/* MUST be of word size due to PIO write requirements */
|
||||
__u32 csum;
|
||||
__le32 csum;
|
||||
__le16 csum_offset;
|
||||
__le16 flags;
|
||||
__u16 first_2_bytes;
|
||||
|
@ -306,7 +306,7 @@ static int mthca_query_gid(struct ib_device *ibdev, u8 port,
|
||||
goto out;
|
||||
}
|
||||
|
||||
memcpy(gid->raw + 8, out_mad->data + (index % 8) * 16, 8);
|
||||
memcpy(gid->raw + 8, out_mad->data + (index % 8) * 8, 8);
|
||||
|
||||
out:
|
||||
kfree(in_mad);
|
||||
|
Loading…
Reference in New Issue
Block a user