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drivers/video: fsl-diu-fb: don't touch registers for unused features
We don't use the writeback buffer, so don't initialize the registers for that feature. The default value for SYN_POL is already zero, so don't re-initialize it. Writing the INT_STATUS register does nothing. The value that we write to the PLUT register only makes sense on the MPC8610 and P1022, so don't touch that register on the MPC5121. Signed-off-by: Timur Tabi <timur@freescale.com>
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@ -825,12 +825,8 @@ static void update_lcdc(struct fb_info *info)
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out_be32(&hw->gamma, DMA_ADDR(data, gamma));
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out_be32(&hw->cursor, DMA_ADDR(data, cursor));
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out_be32(&hw->bgnd, 0x007F7F7F); /* BGND */
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out_be32(&hw->bgnd_wb, 0); /* BGND_WB */
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out_be32(&hw->disp_size, (var->yres << 16 | var->xres));
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/* DISP SIZE */
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out_be32(&hw->wb_size, 0); /* WB SIZE */
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out_be32(&hw->wb_mem_addr, 0); /* WB MEM ADDR */
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out_be32(&hw->bgnd, 0x007F7F7F); /* Set background to grey */
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out_be32(&hw->disp_size, (var->yres << 16) | var->xres);
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/* Horizontal and vertical configuration register */
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temp = var->left_margin << 22 | /* BP_H */
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@ -847,9 +843,20 @@ static void update_lcdc(struct fb_info *info)
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diu_ops.set_pixel_clock(var->pixclock);
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out_be32(&hw->syn_pol, 0); /* SYNC SIGNALS POLARITY */
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out_be32(&hw->int_status, 0); /* INTERRUPT STATUS */
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#ifndef CONFIG_PPC_MPC512x
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/*
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* The PLUT register is defined differently on the MPC5121 than it
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* is on other SOCs. Unfortunately, there's no documentation that
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* explains how it's supposed to be programmed, so for now, we leave
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* it at the default value on the MPC5121.
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*
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* For other SOCs, program it for the highest priority, which will
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* reduce the chance of underrun. Technically, we should scale the
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* priority to match the screen resolution, but doing that properly
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* requires delicate fine-tuning for each use-case.
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*/
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out_be32(&hw->plut, 0x01F5F666);
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#endif
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/* Enable the DIU */
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enable_lcdc(info);
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