nfp: read ME frequency from vNIC ctrl memory

PCIe island clock frequency is used when converting coalescing
parameters from usecs to NFP timestamps.  Most chips don't run
at 1200MHz, allow FW to provide us with the real frequency.

Signed-off-by: Jakub Kicinski <jakub.kicinski@netronome.com>
Reviewed-by: Dirk van der Merwe <dirk.vandermerwe@netronome.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
Jakub Kicinski 2018-01-17 18:51:02 -08:00 committed by David S. Miller
parent 73a0329b05
commit ce991ab666
5 changed files with 19 additions and 13 deletions

View File

@ -2458,7 +2458,7 @@ void nfp_net_coalesce_write_cfg(struct nfp_net *nn)
* ME timestamp ticks. There are 16 ME clock cycles for each timestamp * ME timestamp ticks. There are 16 ME clock cycles for each timestamp
* count. * count.
*/ */
factor = nn->me_freq_mhz / 16; factor = nn->tlv_caps.me_freq_mhz / 16;
/* copy RX interrupt coalesce parameters */ /* copy RX interrupt coalesce parameters */
value = (nn->rx_coalesce_max_frames << 16) | value = (nn->rx_coalesce_max_frames << 16) |

View File

@ -42,6 +42,7 @@
static void nfp_net_tlv_caps_reset(struct nfp_net_tlv_caps *caps) static void nfp_net_tlv_caps_reset(struct nfp_net_tlv_caps *caps)
{ {
memset(caps, 0, sizeof(*caps)); memset(caps, 0, sizeof(*caps));
caps->me_freq_mhz = 1200;
} }
int nfp_net_tlv_caps_parse(struct device *dev, u8 __iomem *ctrl_mem, int nfp_net_tlv_caps_parse(struct device *dev, u8 __iomem *ctrl_mem,
@ -91,6 +92,16 @@ int nfp_net_tlv_caps_parse(struct device *dev, u8 __iomem *ctrl_mem,
dev_err(dev, "END TLV should be empty, has len:%d\n", dev_err(dev, "END TLV should be empty, has len:%d\n",
length); length);
return -EINVAL; return -EINVAL;
case NFP_NET_CFG_TLV_TYPE_ME_FREQ:
if (length != 4) {
dev_err(dev,
"ME FREQ TLV should be 4B, is %dB\n",
length);
return -EINVAL;
}
caps->me_freq_mhz = readl(data);
break;
default: default:
if (!FIELD_GET(NFP_NET_CFG_TLV_HEADER_REQUIRED, hdr)) if (!FIELD_GET(NFP_NET_CFG_TLV_HEADER_REQUIRED, hdr))
break; break;

View File

@ -474,17 +474,24 @@
* %NFP_NET_CFG_TLV_TYPE_END: * %NFP_NET_CFG_TLV_TYPE_END:
* Empty, end of TLV list. Must be the last TLV. Drivers will stop processing * Empty, end of TLV list. Must be the last TLV. Drivers will stop processing
* further TLVs when encountered. * further TLVs when encountered.
*
* %NFP_NET_CFG_TLV_TYPE_ME_FREQ:
* Single word, ME frequency in MHz as used in calculation for
* %NFP_NET_CFG_RXR_IRQ_MOD and %NFP_NET_CFG_TXR_IRQ_MOD.
*/ */
#define NFP_NET_CFG_TLV_TYPE_UNKNOWN 0 #define NFP_NET_CFG_TLV_TYPE_UNKNOWN 0
#define NFP_NET_CFG_TLV_TYPE_RESERVED 1 #define NFP_NET_CFG_TLV_TYPE_RESERVED 1
#define NFP_NET_CFG_TLV_TYPE_END 2 #define NFP_NET_CFG_TLV_TYPE_END 2
#define NFP_NET_CFG_TLV_TYPE_ME_FREQ 3
struct device; struct device;
/** /**
* struct nfp_net_tlv_caps - parsed control BAR TLV capabilities * struct nfp_net_tlv_caps - parsed control BAR TLV capabilities
* @me_freq_mhz: ME clock_freq (MHz)
*/ */
struct nfp_net_tlv_caps { struct nfp_net_tlv_caps {
u32 me_freq_mhz;
}; };
int nfp_net_tlv_caps_parse(struct device *dev, u8 __iomem *ctrl_mem, int nfp_net_tlv_caps_parse(struct device *dev, u8 __iomem *ctrl_mem,

View File

@ -208,12 +208,6 @@ nfp_net_pf_init_vnic(struct nfp_pf *pf, struct nfp_net *nn, unsigned int id)
{ {
int err; int err;
/* Get ME clock frequency from ctrl BAR
* XXX for now frequency is hardcoded until we figure out how
* to get the value from nfp-hwinfo into ctrl bar
*/
nn->me_freq_mhz = 1200;
err = nfp_net_init(nn); err = nfp_net_init(nn);
if (err) if (err)
return err; return err;

View File

@ -277,12 +277,6 @@ static int nfp_netvf_pci_probe(struct pci_dev *pdev,
} }
nfp_net_irqs_assign(nn, vf->irq_entries, num_irqs); nfp_net_irqs_assign(nn, vf->irq_entries, num_irqs);
/* Get ME clock frequency from ctrl BAR
* XXX for now frequency is hardcoded until we figure out how
* to get the value from nfp-hwinfo into ctrl bar
*/
nn->me_freq_mhz = 1200;
err = nfp_net_init(nn); err = nfp_net_init(nn);
if (err) if (err)
goto err_irqs_disable; goto err_irqs_disable;