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dma: shdma: convert to the shdma base library

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The shdma base library has originally been extracted from the shdma driver,
which now can be converted to actually use it.

Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
Signed-off-by: Vinod Koul <vinod.koul@linux.intel.com>
This commit is contained in:
Guennadi Liakhovetski 2012-05-09 17:09:21 +02:00 committed by Vinod Koul
parent b8373147ed
commit ce3a1ab742
3 changed files with 310 additions and 905 deletions
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1138
drivers/dma/sh/shdma.c
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File diff suppressed because it is too large Load Diff

44
drivers/dma/sh/shdma.h
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@ -13,42 +13,27 @@
#ifndef __DMA_SHDMA_H #ifndef __DMA_SHDMA_H
#define __DMA_SHDMA_H #define __DMA_SHDMA_H
#include <linux/shdma-base.h>
#include <linux/dmaengine.h> #include <linux/dmaengine.h>
#include <linux/interrupt.h> #include <linux/interrupt.h>
#include <linux/list.h> #include <linux/list.h>
#define SH_DMAC_MAX_CHANNELS 20 #define SH_DMAE_MAX_CHANNELS 20
#define SH_DMA_SLAVE_NUMBER 256 #define SH_DMAE_TCR_MAX 0x00FFFFFF /* 16MB */
#define SH_DMA_TCR_MAX 0x00FFFFFF /* 16MB */
struct device; struct device;
enum dmae_pm_state {
DMAE_PM_ESTABLISHED,
DMAE_PM_BUSY,
DMAE_PM_PENDING,
};
struct sh_dmae_chan { struct sh_dmae_chan {
spinlock_t desc_lock; /* Descriptor operation lock */ struct shdma_chan shdma_chan;
struct list_head ld_queue; /* Link descriptors queue */
struct list_head ld_free; /* Link descriptors free */
struct dma_chan common; /* DMA common channel */
struct device *dev; /* Channel device */
struct tasklet_struct tasklet; /* Tasklet */
int descs_allocated; /* desc count */
int xmit_shift; /* log_2(bytes_per_xfer) */ int xmit_shift; /* log_2(bytes_per_xfer) */
int irq;
int id; /* Raw id of this channel */
u32 __iomem *base; u32 __iomem *base;
char dev_id[16]; /* unique name per DMAC of channel */ char dev_id[16]; /* unique name per DMAC of channel */
int pm_error; int pm_error;
enum dmae_pm_state pm_state;
}; };
struct sh_dmae_device { struct sh_dmae_device {
struct dma_device common; struct shdma_dev shdma_dev;
struct sh_dmae_chan *chan[SH_DMAC_MAX_CHANNELS]; struct sh_dmae_chan *chan[SH_DMAE_MAX_CHANNELS];
struct sh_dmae_pdata *pdata; struct sh_dmae_pdata *pdata;
struct list_head node; struct list_head node;
u32 __iomem *chan_reg; u32 __iomem *chan_reg;
@ -57,10 +42,21 @@ struct sh_dmae_device {
u32 chcr_ie_bit; u32 chcr_ie_bit;
}; };
#define to_sh_chan(chan) container_of(chan, struct sh_dmae_chan, common) struct sh_dmae_regs {
u32 sar; /* SAR / source address */
u32 dar; /* DAR / destination address */
u32 tcr; /* TCR / transfer count */
};
struct sh_dmae_desc {
struct sh_dmae_regs hw;
struct shdma_desc shdma_desc;
};
#define to_sh_chan(chan) container_of(chan, struct sh_dmae_chan, shdma_chan)
#define to_sh_desc(lh) container_of(lh, struct sh_desc, node) #define to_sh_desc(lh) container_of(lh, struct sh_desc, node)
#define tx_to_sh_desc(tx) container_of(tx, struct sh_desc, async_tx) #define tx_to_sh_desc(tx) container_of(tx, struct sh_desc, async_tx)
#define to_sh_dev(chan) container_of(chan->common.device,\ #define to_sh_dev(chan) container_of(chan->shdma_chan.dma_chan.device,\
struct sh_dmae_device, common) struct sh_dmae_device, shdma_dev.dma_dev)
#endif /* __DMA_SHDMA_H */ #endif /* __DMA_SHDMA_H */

33
include/linux/sh_dma.h
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@ -13,34 +13,21 @@
#include <linux/dmaengine.h> #include <linux/dmaengine.h>
#include <linux/list.h> #include <linux/list.h>
#include <linux/shdma-base.h> #include <linux/shdma-base.h>
#include <linux/types.h>
struct device;
/* Used by slave DMA clients to request DMA to/from a specific peripheral */ /* Used by slave DMA clients to request DMA to/from a specific peripheral */
struct sh_dmae_slave { struct sh_dmae_slave {
union { struct shdma_slave shdma_slave; /* Set by the platform */
unsigned int slave_id; /* Set by the platform */ struct device *dma_dev; /* Set by the platform */
struct shdma_slave shdma_slave; const struct sh_dmae_slave_config *config; /* Set by the driver */
};
struct device *dma_dev; /* Set by the platform */
const struct sh_dmae_slave_config *config; /* Set by the driver */
};
struct sh_dmae_regs {
u32 sar; /* SAR / source address */
u32 dar; /* DAR / destination address */
u32 tcr; /* TCR / transfer count */
};
struct sh_desc {
struct sh_dmae_regs hw;
struct list_head node;
struct dma_async_tx_descriptor async_tx;
enum dma_transfer_direction direction;
dma_cookie_t cookie;
size_t partial;
int chunks;
int mark;
}; };
/*
* Supplied by platforms to specify, how a DMA channel has to be configured for
* a certain peripheral
*/
struct sh_dmae_slave_config { struct sh_dmae_slave_config {
unsigned int slave_id; unsigned int slave_id;
dma_addr_t addr; dma_addr_t addr;