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arm64: dts: mt8183: Add krane-sku176 board
Also known as the Lenovo IdeaPad Duet Chromebook. There are different krane boards with shared resources, hence a mt8183-kukui-krane.dtsi was created for easily introduce future new boards. The same happens with the baseboard codenamed kukui where different variants, apart from kukui variant can take advantage of the shared resources. Signed-off-by: Ben Ho <Ben.Ho@mediatek.com> [originally created by Ben Ho but adapted and ported to mainline] Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com> Tested-by: Hsin-Yi Wang <hsinyi@chromium.org> Link: https://lore.kernel.org/r/20200625101757.101775-8-enric.balletbo@collabora.com Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
This commit is contained in:
parent
6b3bfa37a9
commit
cd894e274b
@ -11,4 +11,5 @@ dtb-$(CONFIG_ARCH_MEDIATEK) += mt8173-elm-hana.dtb
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dtb-$(CONFIG_ARCH_MEDIATEK) += mt8173-elm-hana-rev7.dtb
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dtb-$(CONFIG_ARCH_MEDIATEK) += mt8173-evb.dtb
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dtb-$(CONFIG_ARCH_MEDIATEK) += mt8183-evb.dtb
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dtb-$(CONFIG_ARCH_MEDIATEK) += mt8183-kukui-krane-sku176.dtb
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dtb-$(CONFIG_ARCH_MEDIATEK) += mt8516-pumpkin.dtb
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18
arch/arm64/boot/dts/mediatek/mt8183-kukui-krane-sku176.dts
Normal file
18
arch/arm64/boot/dts/mediatek/mt8183-kukui-krane-sku176.dts
Normal file
@ -0,0 +1,18 @@
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// SPDX-License-Identifier: (GPL-2.0 OR MIT)
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/*
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* Copyright 2019 Google LLC
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*
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* Device-tree for Krane sku176.
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*
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* SKU is a 8-bit value (0xb0 == 176):
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* - Bits 7..4: Panel ID: 0xb (BOE)
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* - Bits 3..0: SKU ID: 0x0 (default)
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*/
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/dts-v1/;
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#include "mt8183-kukui-krane.dtsi"
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/ {
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model = "MediaTek krane sku176 board";
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compatible = "google,krane-sku176", "google,krane", "mediatek,mt8183";
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};
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343
arch/arm64/boot/dts/mediatek/mt8183-kukui-krane.dtsi
Normal file
343
arch/arm64/boot/dts/mediatek/mt8183-kukui-krane.dtsi
Normal file
@ -0,0 +1,343 @@
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// SPDX-License-Identifier: (GPL-2.0 OR MIT)
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/*
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* Copyright 2019 Google LLC
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*/
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#include "mt8183-kukui.dtsi"
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/ {
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ppvarn_lcd: ppvarn-lcd {
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compatible = "regulator-fixed";
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regulator-name = "ppvarn_lcd";
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pinctrl-names = "default";
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pinctrl-0 = <&ppvarn_lcd_en>;
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enable-active-high;
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gpio = <&pio 66 GPIO_ACTIVE_HIGH>;
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};
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ppvarp_lcd: ppvarp-lcd {
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compatible = "regulator-fixed";
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regulator-name = "ppvarp_lcd";
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pinctrl-names = "default";
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pinctrl-0 = <&ppvarp_lcd_en>;
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enable-active-high;
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gpio = <&pio 166 GPIO_ACTIVE_HIGH>;
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};
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pp1800_lcd: pp1800-lcd {
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compatible = "regulator-fixed";
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regulator-name = "pp1800_lcd";
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pinctrl-names = "default";
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pinctrl-0 = <&pp1800_lcd_en>;
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enable-active-high;
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gpio = <&pio 36 GPIO_ACTIVE_HIGH>;
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};
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};
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&bluetooth {
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firmware-name = "nvm_00440302_i2s_eu.bin";
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};
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&i2c0 {
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status = "okay";
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touchscreen4: touchscreen@5d {
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compatible = "hid-over-i2c";
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reg = <0x5d>;
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pinctrl-names = "default";
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pinctrl-0 = <&open_touch>;
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interrupt-parent = <&pio>;
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interrupts = <155 IRQ_TYPE_EDGE_FALLING>;
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post-power-on-delay-ms = <10>;
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hid-descr-addr = <0x0001>;
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};
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};
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&mt6358_vcama2_reg {
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regulator-min-microvolt = <2800000>;
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regulator-max-microvolt = <2800000>;
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};
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&i2c2 {
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pinctrl-names = "default";
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pinctrl-0 = <&i2c2_pins>;
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status = "okay";
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clock-frequency = <400000>;
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eeprom@58 {
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compatible = "atmel,24c32";
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reg = <0x58>;
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pagesize = <32>;
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};
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};
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&i2c4 {
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pinctrl-names = "default";
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pinctrl-0 = <&i2c4_pins>;
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status = "okay";
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clock-frequency = <400000>;
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eeprom@54 {
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compatible = "atmel,24c32";
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reg = <0x54>;
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pagesize = <32>;
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};
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};
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&pio {
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/* 192 lines */
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gpio-line-names =
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"SPI_AP_EC_CS_L",
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"SPI_AP_EC_MOSI",
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"SPI_AP_EC_CLK",
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"I2S3_DO",
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"USB_PD_INT_ODL",
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"",
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"",
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"",
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"",
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"IT6505_HPD_L",
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"I2S3_TDM_D3",
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"SOC_I2C6_1V8_SCL",
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"SOC_I2C6_1V8_SDA",
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"DPI_D0",
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"DPI_D1",
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"DPI_D2",
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"DPI_D3",
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"DPI_D4",
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"DPI_D5",
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"DPI_D6",
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"DPI_D7",
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"DPI_D8",
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"DPI_D9",
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"DPI_D10",
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"DPI_D11",
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"DPI_HSYNC",
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"DPI_VSYNC",
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"DPI_DE",
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"DPI_CK",
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"AP_MSDC1_CLK",
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"AP_MSDC1_DAT3",
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"AP_MSDC1_CMD",
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"AP_MSDC1_DAT0",
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"AP_MSDC1_DAT2",
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"AP_MSDC1_DAT1",
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"",
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"",
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"",
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"",
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"",
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"",
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"OTG_EN",
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"DRVBUS",
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"DISP_PWM",
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"DSI_TE",
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"LCM_RST_1V8",
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"AP_CTS_WIFI_RTS",
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"AP_RTS_WIFI_CTS",
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"SOC_I2C5_1V8_SCL",
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"SOC_I2C5_1V8_SDA",
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"SOC_I2C3_1V8_SCL",
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"SOC_I2C3_1V8_SDA",
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"",
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"",
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"",
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"",
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"",
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"",
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"",
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"",
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"",
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"",
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"",
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"",
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"",
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"",
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"",
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"",
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"",
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"",
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"",
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"",
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"",
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"",
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"",
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"",
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"",
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"",
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"",
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"",
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"",
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"SOC_I2C1_1V8_SDA",
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"SOC_I2C0_1V8_SDA",
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"SOC_I2C0_1V8_SCL",
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"SOC_I2C1_1V8_SCL",
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"AP_SPI_H1_MISO",
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"AP_SPI_H1_CS_L",
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"AP_SPI_H1_MOSI",
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"AP_SPI_H1_CLK",
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"I2S5_BCK",
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"I2S5_LRCK",
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"I2S5_DO",
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"BOOTBLOCK_EN_L",
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"MT8183_KPCOL0",
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"SPI_AP_EC_MISO",
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"UART_DBG_TX_AP_RX",
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"UART_AP_TX_DBG_RX",
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"I2S2_MCK",
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"I2S2_BCK",
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"CLK_5M_WCAM",
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"CLK_2M_UCAM",
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"I2S2_LRCK",
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"I2S2_DI",
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"SOC_I2C2_1V8_SCL",
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"SOC_I2C2_1V8_SDA",
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"SOC_I2C4_1V8_SCL",
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"SOC_I2C4_1V8_SDA",
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"",
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"SCL8",
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"SDA8",
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"FCAM_PWDN_L",
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"",
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"",
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"",
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"",
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"",
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"",
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"",
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"",
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"",
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"",
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"",
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"",
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"",
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"",
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"",
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"",
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"",
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"",
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"",
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"",
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"",
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"",
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"",
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"",
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"",
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"I2S_PMIC",
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"I2S_PMIC",
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"I2S_PMIC",
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"I2S_PMIC",
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"I2S_PMIC",
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"I2S_PMIC",
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"I2S_PMIC",
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"I2S_PMIC",
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"",
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"",
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"",
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"",
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"",
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"",
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/*
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* AP_FLASH_WP_L is crossystem ABI. Rev1 schematics
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* call it BIOS_FLASH_WP_R_L.
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*/
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"AP_FLASH_WP_L",
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"EC_AP_INT_ODL",
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"IT6505_INT_ODL",
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"H1_INT_OD_L",
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"",
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"",
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"",
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"",
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"",
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"",
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"",
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"AP_SPI_FLASH_MISO",
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"AP_SPI_FLASH_CS_L",
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"AP_SPI_FLASH_MOSI",
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"AP_SPI_FLASH_CLK",
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"DA7219_IRQ",
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"",
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"",
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"",
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"",
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"",
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"",
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"",
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"",
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"",
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"",
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"",
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"",
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"",
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"",
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"",
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"",
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"",
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"",
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"",
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"",
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"",
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"",
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"",
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"",
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"",
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"";
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ppvarp_lcd_en: ppvarp-lcd-en {
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pins1 {
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pinmux = <PINMUX_GPIO66__FUNC_GPIO66>;
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output-low;
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};
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};
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ppvarn_lcd_en: ppvarn-lcd-en {
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pins1 {
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pinmux = <PINMUX_GPIO166__FUNC_GPIO166>;
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output-low;
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};
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};
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pp1800_lcd_en: pp1800-lcd-en {
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pins1 {
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pinmux = <PINMUX_GPIO36__FUNC_GPIO36>;
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output-low;
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};
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};
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open_touch: open_touch {
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irq_pin {
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pinmux = <PINMUX_GPIO155__FUNC_GPIO155>;
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input-enable;
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bias-pull-up;
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};
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rst_pin {
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pinmux = <PINMUX_GPIO156__FUNC_GPIO156>;
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/*
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* The pen driver doesn't currently support driving
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* this reset line. By specifying output-high here
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* we're relying on the fact that this pin has a default
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* pulldown at boot (which makes sure the pen was in
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* reset if it was powered) and then we set it high here
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* to take it out of reset. Better would be if the pen
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* driver could control this and we could remove
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* "output-high" here.
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*/
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output-high;
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};
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};
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};
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&qca_wifi {
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qcom,ath10k-calibration-variant = "LE_Krane";
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};
|
788
arch/arm64/boot/dts/mediatek/mt8183-kukui.dtsi
Normal file
788
arch/arm64/boot/dts/mediatek/mt8183-kukui.dtsi
Normal file
@ -0,0 +1,788 @@
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// SPDX-License-Identifier: (GPL-2.0 OR MIT)
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/*
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* Copyright (c) 2018 MediaTek Inc.
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* Author: Ben Ho <ben.ho@mediatek.com>
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* Erin Lo <erin.lo@mediatek.com>
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*/
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/input/input.h>
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#include "mt8183.dtsi"
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#include "mt6358.dtsi"
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/ {
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aliases {
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serial0 = &uart0;
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};
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chosen {
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stdout-path = "serial0:115200n8";
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};
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memory@40000000 {
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device_type = "memory";
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reg = <0 0x40000000 0 0x80000000>;
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};
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clk32k: oscillator1 {
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compatible = "fixed-clock";
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#clock-cells = <0>;
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clock-frequency = <32768>;
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clock-output-names = "clk32k";
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};
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||||
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it6505_pp18_reg: regulator0 {
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compatible = "regulator-fixed";
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regulator-name = "it6505_pp18";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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gpio = <&pio 178 0>;
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enable-active-high;
|
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};
|
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|
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lcd_pp3300: regulator1 {
|
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compatible = "regulator-fixed";
|
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regulator-name = "lcd_pp3300";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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regulator-always-on;
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regulator-boot-on;
|
||||
};
|
||||
|
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bl_pp5000: regulator2 {
|
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compatible = "regulator-fixed";
|
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regulator-name = "bl_pp5000";
|
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regulator-min-microvolt = <5000000>;
|
||||
regulator-max-microvolt = <5000000>;
|
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regulator-always-on;
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regulator-boot-on;
|
||||
};
|
||||
|
||||
mmc1_fixed_power: regulator3 {
|
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compatible = "regulator-fixed";
|
||||
regulator-name = "mmc1_power";
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
};
|
||||
|
||||
mmc1_fixed_io: regulator4 {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "mmc1_io";
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
};
|
||||
|
||||
pp1800_alw: regulator5 {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "pp1800_alw";
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
};
|
||||
|
||||
pp3300_alw: regulator6 {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "pp3300_alw";
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
};
|
||||
|
||||
max98357a: codec0 {
|
||||
compatible = "maxim,max98357a";
|
||||
sdmode-gpios = <&pio 175 0>;
|
||||
};
|
||||
|
||||
btsco: codec1 {
|
||||
compatible = "linux,bt-sco";
|
||||
};
|
||||
|
||||
wifi_pwrseq: wifi-pwrseq {
|
||||
compatible = "mmc-pwrseq-simple";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&wifi_pins_pwrseq>;
|
||||
|
||||
/* Toggle WIFI_ENABLE to reset the chip. */
|
||||
reset-gpios = <&pio 119 1>;
|
||||
};
|
||||
|
||||
wifi_wakeup: wifi-wakeup {
|
||||
compatible = "gpio-keys";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&wifi_pins_wakeup>;
|
||||
|
||||
wowlan {
|
||||
label = "Wake on WiFi";
|
||||
gpios = <&pio 113 GPIO_ACTIVE_HIGH>;
|
||||
linux,code = <KEY_WAKEUP>;
|
||||
wakeup-source;
|
||||
};
|
||||
};
|
||||
|
||||
tboard_thermistor1: thermal-sensor1 {
|
||||
compatible = "generic-adc-thermal";
|
||||
#thermal-sensor-cells = <0>;
|
||||
io-channels = <&auxadc 0>;
|
||||
io-channel-names = "sensor-channel";
|
||||
temperature-lookup-table = < (-5000) 4241
|
||||
0 4063
|
||||
5000 3856
|
||||
10000 3621
|
||||
15000 3364
|
||||
20000 3091
|
||||
25000 2810
|
||||
30000 2526
|
||||
35000 2247
|
||||
40000 1982
|
||||
45000 1734
|
||||
50000 1507
|
||||
55000 1305
|
||||
60000 1122
|
||||
65000 964
|
||||
70000 827
|
||||
75000 710
|
||||
80000 606
|
||||
85000 519
|
||||
90000 445
|
||||
95000 382
|
||||
100000 330
|
||||
105000 284
|
||||
110000 245
|
||||
115000 213
|
||||
120000 183
|
||||
125000 161>;
|
||||
};
|
||||
|
||||
tboard_thermistor2: thermal-sensor2 {
|
||||
compatible = "generic-adc-thermal";
|
||||
#thermal-sensor-cells = <0>;
|
||||
io-channels = <&auxadc 1>;
|
||||
io-channel-names = "sensor-channel";
|
||||
temperature-lookup-table = < (-5000) 4241
|
||||
0 4063
|
||||
5000 3856
|
||||
10000 3621
|
||||
15000 3364
|
||||
20000 3091
|
||||
25000 2810
|
||||
30000 2526
|
||||
35000 2247
|
||||
40000 1982
|
||||
45000 1734
|
||||
50000 1507
|
||||
55000 1305
|
||||
60000 1122
|
||||
65000 964
|
||||
70000 827
|
||||
75000 710
|
||||
80000 606
|
||||
85000 519
|
||||
90000 445
|
||||
95000 382
|
||||
100000 330
|
||||
105000 284
|
||||
110000 245
|
||||
115000 213
|
||||
120000 183
|
||||
125000 161>;
|
||||
};
|
||||
};
|
||||
|
||||
&auxadc {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&cpu0 {
|
||||
proc-supply = <&mt6358_vproc12_reg>;
|
||||
};
|
||||
|
||||
&cpu1 {
|
||||
proc-supply = <&mt6358_vproc12_reg>;
|
||||
};
|
||||
|
||||
&cpu2 {
|
||||
proc-supply = <&mt6358_vproc12_reg>;
|
||||
};
|
||||
|
||||
&cpu3 {
|
||||
proc-supply = <&mt6358_vproc12_reg>;
|
||||
};
|
||||
|
||||
&cpu4 {
|
||||
proc-supply = <&mt6358_vproc11_reg>;
|
||||
};
|
||||
|
||||
&cpu5 {
|
||||
proc-supply = <&mt6358_vproc11_reg>;
|
||||
};
|
||||
|
||||
&cpu6 {
|
||||
proc-supply = <&mt6358_vproc11_reg>;
|
||||
};
|
||||
|
||||
&cpu7 {
|
||||
proc-supply = <&mt6358_vproc11_reg>;
|
||||
};
|
||||
|
||||
&i2c0 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&i2c0_pins>;
|
||||
status = "okay";
|
||||
clock-frequency = <400000>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
};
|
||||
|
||||
&i2c1 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&i2c1_pins>;
|
||||
status = "okay";
|
||||
clock-frequency = <100000>;
|
||||
};
|
||||
|
||||
&i2c3 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&i2c3_pins>;
|
||||
status = "okay";
|
||||
clock-frequency = <100000>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
};
|
||||
|
||||
&i2c5 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&i2c5_pins>;
|
||||
status = "okay";
|
||||
clock-frequency = <100000>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
};
|
||||
|
||||
&i2c6 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&i2c6_pins>;
|
||||
status = "okay";
|
||||
clock-frequency = <100000>;
|
||||
};
|
||||
|
||||
&mmc0 {
|
||||
status = "okay";
|
||||
pinctrl-names = "default", "state_uhs";
|
||||
pinctrl-0 = <&mmc0_pins_default>;
|
||||
pinctrl-1 = <&mmc0_pins_uhs>;
|
||||
bus-width = <8>;
|
||||
max-frequency = <200000000>;
|
||||
cap-mmc-highspeed;
|
||||
mmc-hs200-1_8v;
|
||||
mmc-hs400-1_8v;
|
||||
cap-mmc-hw-reset;
|
||||
no-sdio;
|
||||
no-sd;
|
||||
hs400-ds-delay = <0x12814>;
|
||||
vmmc-supply = <&mt6358_vemc_reg>;
|
||||
vqmmc-supply = <&mt6358_vio18_reg>;
|
||||
assigned-clocks = <&topckgen CLK_TOP_MUX_MSDC50_0>;
|
||||
assigned-clock-parents = <&topckgen CLK_TOP_MSDCPLL_CK>;
|
||||
non-removable;
|
||||
};
|
||||
|
||||
&mmc1 {
|
||||
status = "okay";
|
||||
pinctrl-names = "default", "state_uhs";
|
||||
pinctrl-0 = <&mmc1_pins_default>;
|
||||
pinctrl-1 = <&mmc1_pins_uhs>;
|
||||
vmmc-supply = <&mmc1_fixed_power>;
|
||||
vqmmc-supply = <&mmc1_fixed_io>;
|
||||
mmc-pwrseq = <&wifi_pwrseq>;
|
||||
bus-width = <4>;
|
||||
max-frequency = <200000000>;
|
||||
drv-type = <2>;
|
||||
cap-sd-highspeed;
|
||||
sd-uhs-sdr50;
|
||||
sd-uhs-sdr104;
|
||||
keep-power-in-suspend;
|
||||
enable-sdio-wakeup;
|
||||
cap-sdio-irq;
|
||||
non-removable;
|
||||
no-mmc;
|
||||
no-sd;
|
||||
assigned-clocks = <&topckgen CLK_TOP_MUX_MSDC30_1>;
|
||||
assigned-clock-parents = <&topckgen CLK_TOP_MSDCPLL_D2>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
qca_wifi: qca-wifi@1 {
|
||||
compatible = "qcom,ath10k";
|
||||
reg = <1>;
|
||||
};
|
||||
};
|
||||
|
||||
&mt6358_vdram2_reg {
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
&mt6358codec {
|
||||
Avdd-supply = <&mt6358_vaud28_reg>;
|
||||
};
|
||||
|
||||
&mt6358_vsim1_reg {
|
||||
regulator-min-microvolt = <2700000>;
|
||||
regulator-max-microvolt = <2700000>;
|
||||
};
|
||||
|
||||
&mt6358_vsim2_reg {
|
||||
regulator-min-microvolt = <2700000>;
|
||||
regulator-max-microvolt = <2700000>;
|
||||
};
|
||||
|
||||
&pio {
|
||||
bt_pins: bt-pins {
|
||||
pins_bt_en {
|
||||
pinmux = <PINMUX_GPIO120__FUNC_GPIO120>;
|
||||
output-low;
|
||||
};
|
||||
};
|
||||
|
||||
ec_ap_int_odl: ec_ap_int_odl {
|
||||
pins1 {
|
||||
pinmux = <PINMUX_GPIO151__FUNC_GPIO151>;
|
||||
input-enable;
|
||||
bias-pull-up;
|
||||
};
|
||||
};
|
||||
|
||||
h1_int_od_l: h1_int_od_l {
|
||||
pins1 {
|
||||
pinmux = <PINMUX_GPIO153__FUNC_GPIO153>;
|
||||
input-enable;
|
||||
};
|
||||
};
|
||||
|
||||
i2c0_pins: i2c0 {
|
||||
pins_bus {
|
||||
pinmux = <PINMUX_GPIO82__FUNC_SDA0>,
|
||||
<PINMUX_GPIO83__FUNC_SCL0>;
|
||||
mediatek,pull-up-adv = <3>;
|
||||
mediatek,drive-strength-adv = <00>;
|
||||
};
|
||||
};
|
||||
|
||||
i2c1_pins: i2c1 {
|
||||
pins_bus {
|
||||
pinmux = <PINMUX_GPIO81__FUNC_SDA1>,
|
||||
<PINMUX_GPIO84__FUNC_SCL1>;
|
||||
mediatek,pull-up-adv = <3>;
|
||||
mediatek,drive-strength-adv = <00>;
|
||||
};
|
||||
};
|
||||
|
||||
i2c2_pins: i2c2 {
|
||||
pins_bus {
|
||||
pinmux = <PINMUX_GPIO103__FUNC_SCL2>,
|
||||
<PINMUX_GPIO104__FUNC_SDA2>;
|
||||
bias-disable;
|
||||
mediatek,drive-strength-adv = <00>;
|
||||
};
|
||||
};
|
||||
|
||||
i2c3_pins: i2c3 {
|
||||
pins_bus {
|
||||
pinmux = <PINMUX_GPIO50__FUNC_SCL3>,
|
||||
<PINMUX_GPIO51__FUNC_SDA3>;
|
||||
mediatek,pull-up-adv = <3>;
|
||||
mediatek,drive-strength-adv = <00>;
|
||||
};
|
||||
};
|
||||
|
||||
i2c4_pins: i2c4 {
|
||||
pins_bus {
|
||||
pinmux = <PINMUX_GPIO105__FUNC_SCL4>,
|
||||
<PINMUX_GPIO106__FUNC_SDA4>;
|
||||
bias-disable;
|
||||
mediatek,drive-strength-adv = <00>;
|
||||
};
|
||||
};
|
||||
|
||||
i2c5_pins: i2c5 {
|
||||
pins_bus {
|
||||
pinmux = <PINMUX_GPIO48__FUNC_SCL5>,
|
||||
<PINMUX_GPIO49__FUNC_SDA5>;
|
||||
mediatek,pull-up-adv = <3>;
|
||||
mediatek,drive-strength-adv = <00>;
|
||||
};
|
||||
};
|
||||
|
||||
i2c6_pins: i2c6 {
|
||||
pins_bus {
|
||||
pinmux = <PINMUX_GPIO11__FUNC_SCL6>,
|
||||
<PINMUX_GPIO12__FUNC_SDA6>;
|
||||
bias-disable;
|
||||
};
|
||||
};
|
||||
|
||||
mmc0_pins_default: mmc0-pins-default {
|
||||
pins_cmd_dat {
|
||||
pinmux = <PINMUX_GPIO123__FUNC_MSDC0_DAT0>,
|
||||
<PINMUX_GPIO128__FUNC_MSDC0_DAT1>,
|
||||
<PINMUX_GPIO125__FUNC_MSDC0_DAT2>,
|
||||
<PINMUX_GPIO132__FUNC_MSDC0_DAT3>,
|
||||
<PINMUX_GPIO126__FUNC_MSDC0_DAT4>,
|
||||
<PINMUX_GPIO129__FUNC_MSDC0_DAT5>,
|
||||
<PINMUX_GPIO127__FUNC_MSDC0_DAT6>,
|
||||
<PINMUX_GPIO130__FUNC_MSDC0_DAT7>,
|
||||
<PINMUX_GPIO122__FUNC_MSDC0_CMD>;
|
||||
input-enable;
|
||||
drive-strength = <MTK_DRIVE_14mA>;
|
||||
mediatek,pull-up-adv = <01>;
|
||||
};
|
||||
|
||||
pins_clk {
|
||||
pinmux = <PINMUX_GPIO124__FUNC_MSDC0_CLK>;
|
||||
drive-strength = <MTK_DRIVE_14mA>;
|
||||
mediatek,pull-down-adv = <10>;
|
||||
};
|
||||
|
||||
pins_rst {
|
||||
pinmux = <PINMUX_GPIO133__FUNC_MSDC0_RSTB>;
|
||||
drive-strength = <MTK_DRIVE_14mA>;
|
||||
mediatek,pull-down-adv = <01>;
|
||||
};
|
||||
};
|
||||
|
||||
mmc0_pins_uhs: mmc0-pins-uhs {
|
||||
pins_cmd_dat {
|
||||
pinmux = <PINMUX_GPIO123__FUNC_MSDC0_DAT0>,
|
||||
<PINMUX_GPIO128__FUNC_MSDC0_DAT1>,
|
||||
<PINMUX_GPIO125__FUNC_MSDC0_DAT2>,
|
||||
<PINMUX_GPIO132__FUNC_MSDC0_DAT3>,
|
||||
<PINMUX_GPIO126__FUNC_MSDC0_DAT4>,
|
||||
<PINMUX_GPIO129__FUNC_MSDC0_DAT5>,
|
||||
<PINMUX_GPIO127__FUNC_MSDC0_DAT6>,
|
||||
<PINMUX_GPIO130__FUNC_MSDC0_DAT7>,
|
||||
<PINMUX_GPIO122__FUNC_MSDC0_CMD>;
|
||||
input-enable;
|
||||
drive-strength = <MTK_DRIVE_14mA>;
|
||||
mediatek,pull-up-adv = <01>;
|
||||
};
|
||||
|
||||
pins_clk {
|
||||
pinmux = <PINMUX_GPIO124__FUNC_MSDC0_CLK>;
|
||||
drive-strength = <MTK_DRIVE_14mA>;
|
||||
mediatek,pull-down-adv = <10>;
|
||||
};
|
||||
|
||||
pins_ds {
|
||||
pinmux = <PINMUX_GPIO131__FUNC_MSDC0_DSL>;
|
||||
drive-strength = <MTK_DRIVE_14mA>;
|
||||
mediatek,pull-down-adv = <10>;
|
||||
};
|
||||
|
||||
pins_rst {
|
||||
pinmux = <PINMUX_GPIO133__FUNC_MSDC0_RSTB>;
|
||||
drive-strength = <MTK_DRIVE_14mA>;
|
||||
mediatek,pull-up-adv = <01>;
|
||||
};
|
||||
};
|
||||
|
||||
mmc1_pins_default: mmc1-pins-default {
|
||||
pins_cmd_dat {
|
||||
pinmux = <PINMUX_GPIO31__FUNC_MSDC1_CMD>,
|
||||
<PINMUX_GPIO32__FUNC_MSDC1_DAT0>,
|
||||
<PINMUX_GPIO34__FUNC_MSDC1_DAT1>,
|
||||
<PINMUX_GPIO33__FUNC_MSDC1_DAT2>,
|
||||
<PINMUX_GPIO30__FUNC_MSDC1_DAT3>;
|
||||
input-enable;
|
||||
mediatek,pull-up-adv = <10>;
|
||||
};
|
||||
|
||||
pins_clk {
|
||||
pinmux = <PINMUX_GPIO29__FUNC_MSDC1_CLK>;
|
||||
input-enable;
|
||||
mediatek,pull-down-adv = <10>;
|
||||
};
|
||||
};
|
||||
|
||||
mmc1_pins_uhs: mmc1-pins-uhs {
|
||||
pins_cmd_dat {
|
||||
pinmux = <PINMUX_GPIO31__FUNC_MSDC1_CMD>,
|
||||
<PINMUX_GPIO32__FUNC_MSDC1_DAT0>,
|
||||
<PINMUX_GPIO34__FUNC_MSDC1_DAT1>,
|
||||
<PINMUX_GPIO33__FUNC_MSDC1_DAT2>,
|
||||
<PINMUX_GPIO30__FUNC_MSDC1_DAT3>;
|
||||
drive-strength = <MTK_DRIVE_6mA>;
|
||||
input-enable;
|
||||
mediatek,pull-up-adv = <10>;
|
||||
};
|
||||
|
||||
pins_clk {
|
||||
pinmux = <PINMUX_GPIO29__FUNC_MSDC1_CLK>;
|
||||
drive-strength = <MTK_DRIVE_8mA>;
|
||||
mediatek,pull-down-adv = <10>;
|
||||
input-enable;
|
||||
};
|
||||
};
|
||||
|
||||
spi0_pins: spi0 {
|
||||
pins_spi{
|
||||
pinmux = <PINMUX_GPIO85__FUNC_SPI0_MI>,
|
||||
<PINMUX_GPIO86__FUNC_GPIO86>,
|
||||
<PINMUX_GPIO87__FUNC_SPI0_MO>,
|
||||
<PINMUX_GPIO88__FUNC_SPI0_CLK>;
|
||||
bias-disable;
|
||||
};
|
||||
};
|
||||
|
||||
spi1_pins: spi1 {
|
||||
pins_spi{
|
||||
pinmux = <PINMUX_GPIO161__FUNC_SPI1_A_MI>,
|
||||
<PINMUX_GPIO162__FUNC_SPI1_A_CSB>,
|
||||
<PINMUX_GPIO163__FUNC_SPI1_A_MO>,
|
||||
<PINMUX_GPIO164__FUNC_SPI1_A_CLK>;
|
||||
bias-disable;
|
||||
};
|
||||
};
|
||||
|
||||
spi2_pins: spi2 {
|
||||
pins_spi{
|
||||
pinmux = <PINMUX_GPIO0__FUNC_SPI2_CSB>,
|
||||
<PINMUX_GPIO1__FUNC_SPI2_MO>,
|
||||
<PINMUX_GPIO2__FUNC_SPI2_CLK>;
|
||||
bias-disable;
|
||||
};
|
||||
pins_spi_mi {
|
||||
pinmux = <PINMUX_GPIO94__FUNC_SPI2_MI>;
|
||||
mediatek,pull-down-adv = <00>;
|
||||
};
|
||||
};
|
||||
|
||||
spi3_pins: spi3 {
|
||||
pins_spi{
|
||||
pinmux = <PINMUX_GPIO21__FUNC_SPI3_MI>,
|
||||
<PINMUX_GPIO22__FUNC_SPI3_CSB>,
|
||||
<PINMUX_GPIO23__FUNC_SPI3_MO>,
|
||||
<PINMUX_GPIO24__FUNC_SPI3_CLK>;
|
||||
bias-disable;
|
||||
};
|
||||
};
|
||||
|
||||
spi4_pins: spi4 {
|
||||
pins_spi{
|
||||
pinmux = <PINMUX_GPIO17__FUNC_SPI4_MI>,
|
||||
<PINMUX_GPIO18__FUNC_SPI4_CSB>,
|
||||
<PINMUX_GPIO19__FUNC_SPI4_MO>,
|
||||
<PINMUX_GPIO20__FUNC_SPI4_CLK>;
|
||||
bias-disable;
|
||||
};
|
||||
};
|
||||
|
||||
spi5_pins: spi5 {
|
||||
pins_spi{
|
||||
pinmux = <PINMUX_GPIO13__FUNC_SPI5_MI>,
|
||||
<PINMUX_GPIO14__FUNC_SPI5_CSB>,
|
||||
<PINMUX_GPIO15__FUNC_SPI5_MO>,
|
||||
<PINMUX_GPIO16__FUNC_SPI5_CLK>;
|
||||
bias-disable;
|
||||
};
|
||||
};
|
||||
|
||||
uart0_pins_default: uart0-pins-default {
|
||||
pins_rx {
|
||||
pinmux = <PINMUX_GPIO95__FUNC_URXD0>;
|
||||
input-enable;
|
||||
bias-pull-up;
|
||||
};
|
||||
pins_tx {
|
||||
pinmux = <PINMUX_GPIO96__FUNC_UTXD0>;
|
||||
};
|
||||
};
|
||||
|
||||
uart1_pins_default: uart1-pins-default {
|
||||
pins_rx {
|
||||
pinmux = <PINMUX_GPIO121__FUNC_URXD1>;
|
||||
input-enable;
|
||||
bias-pull-up;
|
||||
};
|
||||
pins_tx {
|
||||
pinmux = <PINMUX_GPIO115__FUNC_UTXD1>;
|
||||
};
|
||||
pins_rts {
|
||||
pinmux = <PINMUX_GPIO47__FUNC_URTS1>;
|
||||
output-enable;
|
||||
};
|
||||
pins_cts {
|
||||
pinmux = <PINMUX_GPIO46__FUNC_UCTS1>;
|
||||
input-enable;
|
||||
};
|
||||
};
|
||||
|
||||
uart1_pins_sleep: uart1-pins-sleep {
|
||||
pins_rx {
|
||||
pinmux = <PINMUX_GPIO121__FUNC_GPIO121>;
|
||||
input-enable;
|
||||
bias-pull-up;
|
||||
};
|
||||
pins_tx {
|
||||
pinmux = <PINMUX_GPIO115__FUNC_UTXD1>;
|
||||
};
|
||||
pins_rts {
|
||||
pinmux = <PINMUX_GPIO47__FUNC_URTS1>;
|
||||
output-enable;
|
||||
};
|
||||
pins_cts {
|
||||
pinmux = <PINMUX_GPIO46__FUNC_UCTS1>;
|
||||
input-enable;
|
||||
};
|
||||
};
|
||||
|
||||
wifi_pins_pwrseq: wifi-pins-pwrseq {
|
||||
pins_wifi_enable {
|
||||
pinmux = <PINMUX_GPIO119__FUNC_GPIO119>;
|
||||
output-low;
|
||||
};
|
||||
};
|
||||
|
||||
wifi_pins_wakeup: wifi-pins-wakeup {
|
||||
pins_wifi_wakeup {
|
||||
pinmux = <PINMUX_GPIO113__FUNC_GPIO113>;
|
||||
input-enable;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&soc_data {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&spi0 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&spi0_pins>;
|
||||
mediatek,pad-select = <0>;
|
||||
status = "okay";
|
||||
cs-gpios = <&pio 86 GPIO_ACTIVE_LOW>;
|
||||
|
||||
cr50@0 {
|
||||
compatible = "google,cr50";
|
||||
reg = <0>;
|
||||
spi-max-frequency = <1000000>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&h1_int_od_l>;
|
||||
interrupt-parent = <&pio>;
|
||||
interrupts = <153 IRQ_TYPE_EDGE_RISING>;
|
||||
};
|
||||
};
|
||||
|
||||
&spi1 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&spi1_pins>;
|
||||
mediatek,pad-select = <0>;
|
||||
status = "okay";
|
||||
|
||||
w25q64dw: spi-flash@0 {
|
||||
compatible = "winbond,w25q64dw", "jedec,spi-nor";
|
||||
reg = <0>;
|
||||
spi-max-frequency = <25000000>;
|
||||
};
|
||||
};
|
||||
|
||||
&spi2 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&spi2_pins>;
|
||||
mediatek,pad-select = <0>;
|
||||
status = "okay";
|
||||
|
||||
cros_ec: cros-ec@0 {
|
||||
compatible = "google,cros-ec-spi";
|
||||
reg = <0>;
|
||||
spi-max-frequency = <3000000>;
|
||||
interrupt-parent = <&pio>;
|
||||
interrupts = <151 IRQ_TYPE_LEVEL_LOW>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&ec_ap_int_odl>;
|
||||
|
||||
i2c_tunnel: i2c-tunnel {
|
||||
compatible = "google,cros-ec-i2c-tunnel";
|
||||
google,remote-bus = <1>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
};
|
||||
|
||||
usbc_extcon: extcon0 {
|
||||
compatible = "google,extcon-usbc-cros-ec";
|
||||
google,usb-port-id = <0>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&spi3 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&spi3_pins>;
|
||||
mediatek,pad-select = <0>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
&spi4 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&spi4_pins>;
|
||||
mediatek,pad-select = <0>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
&spi5 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&spi5_pins>;
|
||||
mediatek,pad-select = <0>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
&ssusb {
|
||||
dr_mode = "host";
|
||||
wakeup-source;
|
||||
vusb33-supply = <&mt6358_vusb_reg>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&u3phy {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&uart0 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&uart0_pins_default>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&uart1 {
|
||||
pinctrl-names = "default", "sleep";
|
||||
pinctrl-0 = <&uart1_pins_default>;
|
||||
pinctrl-1 = <&uart1_pins_sleep>;
|
||||
status = "okay";
|
||||
interrupts-extended = <&sysirq GIC_SPI 92 IRQ_TYPE_LEVEL_LOW>,
|
||||
<&pio 121 IRQ_TYPE_EDGE_FALLING>;
|
||||
|
||||
bluetooth: bluetooth {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&bt_pins>;
|
||||
status = "okay";
|
||||
compatible = "qcom,qca6174-bt";
|
||||
enable-gpios = <&pio 120 0>;
|
||||
clocks = <&clk32k>;
|
||||
firmware-name = "nvm_00440302_i2s.bin";
|
||||
};
|
||||
};
|
||||
|
||||
&usb_host {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
vusb33-supply = <&mt6358_vusb_reg>;
|
||||
status = "okay";
|
||||
|
||||
hub@1 {
|
||||
compatible = "usb5e3,610";
|
||||
reg = <1>;
|
||||
};
|
||||
};
|
||||
|
||||
#include <arm/cros-ec-keyboard.dtsi>
|
||||
#include <arm/cros-ec-sbs.dtsi>
|
Loading…
Reference in New Issue
Block a user