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ARM: dts: suniv: Add Lctech Pi F1C200s devicetree
The Lctech Pi F1C200s (also previously known under the Cherry Pi brand) is a small development board with the Allwinner F1C200s SoC. This is the same as the F1C100s, but with 64MB instead of 32MB co-packaged DRAM. Alongside the obligatory micro-SD card slot, the board features a SPI-NAND flash chip, LCD and touch connectors, and unpopulated expansion header pins. There are two USB Type-C ports on the board: One supplies the power, also connects to the USB MUSB OTG controller port. The other one is connected to an CH340 USB serial chip, which in turn is connected to UART1. Add a devicetree file, so that the board can be used easily. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jernej Skrabec <jernej.skrabec@gmail.com> Link: https://lore.kernel.org/r/20230319212936.26649-7-andre.przywara@arm.com Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
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@ -1407,6 +1407,7 @@ dtb-$(CONFIG_MACH_SUN9I) += \
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sun9i-a80-cubieboard4.dtb
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dtb-$(CONFIG_MACH_SUNIV) += \
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suniv-f1c100s-licheepi-nano.dtb \
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suniv-f1c200s-lctech-pi.dtb \
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suniv-f1c200s-popstick-v1.1.dtb
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dtb-$(CONFIG_ARCH_TEGRA_2x_SOC) += \
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tegra20-acer-a500-picasso.dtb \
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@ -207,6 +207,12 @@
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pins = "PE0", "PE1";
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function = "uart0";
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};
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/omit-if-no-ref/
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uart1_pa_pins: uart1-pa-pins {
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pins = "PA2", "PA3";
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function = "uart1";
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};
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};
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i2c0: i2c@1c27000 {
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76
arch/arm/boot/dts/suniv-f1c200s-lctech-pi.dts
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76
arch/arm/boot/dts/suniv-f1c200s-lctech-pi.dts
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@ -0,0 +1,76 @@
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// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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/*
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* Copyright 2022 Arm Ltd,
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* based on work:
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* Copyright 2022 Icenowy Zheng <uwu@icenowy.me>
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*/
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/dts-v1/;
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#include "suniv-f1c100s.dtsi"
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#include <dt-bindings/gpio/gpio.h>
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/ {
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model = "Lctech Pi F1C200s";
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compatible = "lctech,pi-f1c200s", "allwinner,suniv-f1c200s",
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"allwinner,suniv-f1c100s";
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aliases {
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serial0 = &uart1;
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};
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chosen {
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stdout-path = "serial0:115200n8";
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};
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reg_vcc3v3: regulator-3v3 {
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compatible = "regulator-fixed";
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regulator-name = "vcc3v3";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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};
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};
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&mmc0 {
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broken-cd;
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bus-width = <4>;
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disable-wp;
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vmmc-supply = <®_vcc3v3>;
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status = "okay";
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};
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&otg_sram {
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status = "okay";
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};
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&spi0 {
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pinctrl-names = "default";
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pinctrl-0 = <&spi0_pc_pins>;
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status = "okay";
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flash@0 {
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compatible = "spi-nand";
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reg = <0>;
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spi-max-frequency = <40000000>;
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};
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};
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&uart1 {
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pinctrl-names = "default";
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pinctrl-0 = <&uart1_pa_pins>;
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status = "okay";
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};
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/*
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* This is a Type-C socket, but CC1/2 are not connected, and VBUS is connected
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* to Vin, which supplies the board. Host mode works (if the board is powered
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* otherwise), but peripheral is probably the intention.
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*/
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&usb_otg {
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dr_mode = "peripheral";
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status = "okay";
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};
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&usbphy {
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status = "okay";
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};
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