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soc: TI knav_qmss: fix dma_addr_t printing
The knav_qmss driver is currently broken when CONFIG_LPAE is set, which is a bit surprising because I'd expect that any serious users of this platforms would have more than 2GB of RAM and require LPAE. The compiler clearly warns about an incorrect use of dma_addr_t in the debug kernel messages: ti/knav_qmss_queue.c: In function 'knav_queue_setup_region': ti/knav_qmss_queue.c:1025:117: warning: format '%x' expects argument of type 'unsigned int', but argument 9 has type 'dma_addr_t {aka long long unsigned int}' [-Wformat=] ti/knav_qmss_queue.c:1025:117: warning: format '%x' expects argument of type 'unsigned int', but argument 10 has type 'dma_addr_t {aka long long unsigned int}' [-Wformat=] ti/knav_qmss_queue.c: In function 'knav_queue_setup_link_ram': ti/knav_qmss_queue.c:1175:118: warning: format '%x' expects argument of type 'unsigned int', but argument 4 has type 'dma_addr_t {aka long long unsigned int}' [-Wformat=] This patch changes all the debugging output to use the correct %pad format string that works with both 32-bit and 64-bit dma_addr_t. As the variable naming is somewhat confusing here, I also change all *_phys names to *_dma when they refer to bus addresses that are used for DMA rather than a physical memory address as seen from the CPU. This is particularly important on keystone, because the two things are not the same there. Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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@ -93,13 +93,13 @@ struct knav_reg_pdsp_regs {
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struct knav_reg_acc_command {
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u32 command;
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u32 queue_mask;
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u32 list_phys;
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u32 list_dma;
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u32 queue_num;
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u32 timer_config;
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};
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struct knav_link_ram_block {
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dma_addr_t phys;
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dma_addr_t dma;
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void *virt;
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size_t size;
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};
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@ -122,8 +122,8 @@ static irqreturn_t knav_acc_int_handler(int irq, void *_instdata)
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channel = acc->channel;
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list_dma = acc->list_dma[acc->list_index];
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list_cpu = acc->list_cpu[acc->list_index];
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dev_dbg(kdev->dev, "acc-irq: channel %d, list %d, virt %p, phys %x\n",
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channel, acc->list_index, list_cpu, list_dma);
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dev_dbg(kdev->dev, "acc-irq: channel %d, list %d, virt %p, dma %pad\n",
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channel, acc->list_index, list_cpu, &list_dma);
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if (atomic_read(&acc->retrigger_count)) {
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atomic_dec(&acc->retrigger_count);
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__knav_acc_notify(range, acc);
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@ -297,12 +297,12 @@ knav_acc_write(struct knav_device *kdev, struct knav_pdsp_info *pdsp,
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u32 result;
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dev_dbg(kdev->dev, "acc command %08x %08x %08x %08x %08x\n",
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cmd->command, cmd->queue_mask, cmd->list_phys,
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cmd->command, cmd->queue_mask, cmd->list_dma,
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cmd->queue_num, cmd->timer_config);
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writel_relaxed(cmd->timer_config, &pdsp->acc_command->timer_config);
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writel_relaxed(cmd->queue_num, &pdsp->acc_command->queue_num);
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writel_relaxed(cmd->list_phys, &pdsp->acc_command->list_phys);
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writel_relaxed(cmd->list_dma, &pdsp->acc_command->list_dma);
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writel_relaxed(cmd->queue_mask, &pdsp->acc_command->queue_mask);
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writel_relaxed(cmd->command, &pdsp->acc_command->command);
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@ -337,7 +337,7 @@ static void knav_acc_setup_cmd(struct knav_device *kdev,
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memset(cmd, 0, sizeof(*cmd));
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cmd->command = acc->channel;
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cmd->queue_mask = queue_mask;
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cmd->list_phys = acc->list_dma[0];
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cmd->list_dma = (u32)acc->list_dma[0];
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cmd->queue_num = info->list_entries << 16;
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cmd->queue_num |= queue_base;
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@ -591,8 +591,8 @@ int knav_init_acc_range(struct knav_device *kdev,
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acc->list_cpu[1] = list_mem + list_size;
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acc->list_dma[0] = list_dma;
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acc->list_dma[1] = list_dma + list_size;
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dev_dbg(kdev->dev, "%s: channel %d, phys %08x, virt %8p\n",
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acc->name, acc->channel, list_dma, list_mem);
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dev_dbg(kdev->dev, "%s: channel %d, dma %pad, virt %8p\n",
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acc->name, acc->channel, &list_dma, list_mem);
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}
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range->ops = &knav_acc_range_ops;
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@ -1023,9 +1023,9 @@ static void knav_queue_setup_region(struct knav_device *kdev,
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list_add(&pool->region_inst, ®ion->pools);
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dev_dbg(kdev->dev,
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"region %s (%d): size:%d, link:%d@%d, phys:%08x-%08x, virt:%p-%p\n",
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"region %s (%d): size:%d, link:%d@%d, dma:%pad-%pad, virt:%p-%p\n",
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region->name, id, region->desc_size, region->num_desc,
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region->link_index, region->dma_start, region->dma_end,
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region->link_index, ®ion->dma_start, ®ion->dma_end,
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region->virt_start, region->virt_end);
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hw_desc_size = (region->desc_size / 16) - 1;
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@ -1033,7 +1033,7 @@ static void knav_queue_setup_region(struct knav_device *kdev,
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for_each_qmgr(kdev, qmgr) {
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regs = qmgr->reg_region + id;
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writel_relaxed(region->dma_start, ®s->base);
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writel_relaxed((u32)region->dma_start, ®s->base);
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writel_relaxed(region->link_index, ®s->start_index);
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writel_relaxed(hw_desc_size << 16 | hw_num_desc,
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®s->size_count);
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@ -1145,14 +1145,14 @@ static int knav_get_link_ram(struct knav_device *kdev,
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* queue_base specified => using internal or onchip
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* link ram WARNING - we do not "reserve" this block
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*/
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block->phys = (dma_addr_t)temp[0];
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block->dma = (dma_addr_t)temp[0];
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block->virt = NULL;
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block->size = temp[1];
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} else {
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block->size = temp[1];
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/* queue_base not specific => allocate requested size */
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block->virt = dmam_alloc_coherent(kdev->dev,
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8 * block->size, &block->phys,
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8 * block->size, &block->dma,
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GFP_KERNEL);
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if (!block->virt) {
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dev_err(kdev->dev, "failed to alloc linkram\n");
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@ -1172,18 +1172,18 @@ static int knav_queue_setup_link_ram(struct knav_device *kdev)
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for_each_qmgr(kdev, qmgr) {
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block = &kdev->link_rams[0];
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dev_dbg(kdev->dev, "linkram0: phys:%x, virt:%p, size:%x\n",
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block->phys, block->virt, block->size);
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writel_relaxed(block->phys, &qmgr->reg_config->link_ram_base0);
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dev_dbg(kdev->dev, "linkram0: dma:%pad, virt:%p, size:%x\n",
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&block->dma, block->virt, block->size);
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writel_relaxed((u32)block->dma, &qmgr->reg_config->link_ram_base0);
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writel_relaxed(block->size, &qmgr->reg_config->link_ram_size0);
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block++;
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if (!block->size)
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continue;
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dev_dbg(kdev->dev, "linkram1: phys:%x, virt:%p, size:%x\n",
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block->phys, block->virt, block->size);
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writel_relaxed(block->phys, &qmgr->reg_config->link_ram_base1);
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dev_dbg(kdev->dev, "linkram1: dma:%pad, virt:%p, size:%x\n",
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&block->dma, block->virt, block->size);
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writel_relaxed(block->dma, &qmgr->reg_config->link_ram_base1);
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}
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return 0;
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