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[TG3]: use new TG3_FLG2_5750_PLUS flag
Replace a number of two-way if statements checking for 5750, and/or 5752 to reference the newly-defined TG3_FLG2_5750_PLUS flag instead. Signed-off-by: John W. Linville <linville@tuxdriver.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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6708e5cc10
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cbf46853c8
@ -1067,8 +1067,7 @@ static int tg3_set_power_state(struct tg3 *tp, int state)
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mac_mode = MAC_MODE_PORT_MODE_TBI;
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mac_mode = MAC_MODE_PORT_MODE_TBI;
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}
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}
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if (GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_5750 &&
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if (!(tp->tg3_flags2 & TG3_FLG2_5750_PLUS))
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GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_5752)
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tw32(MAC_LED_CTRL, tp->led_ctrl);
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tw32(MAC_LED_CTRL, tp->led_ctrl);
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if (((power_caps & PCI_PM_CAP_PME_D3cold) &&
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if (((power_caps & PCI_PM_CAP_PME_D3cold) &&
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@ -3967,8 +3966,7 @@ static int tg3_chip_reset(struct tg3 *tp)
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tg3_read_mem(tp, NIC_SRAM_DATA_CFG, &nic_cfg);
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tg3_read_mem(tp, NIC_SRAM_DATA_CFG, &nic_cfg);
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if (nic_cfg & NIC_SRAM_DATA_CFG_ASF_ENABLE) {
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if (nic_cfg & NIC_SRAM_DATA_CFG_ASF_ENABLE) {
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tp->tg3_flags |= TG3_FLAG_ENABLE_ASF;
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tp->tg3_flags |= TG3_FLAG_ENABLE_ASF;
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if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5750 ||
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if (tp->tg3_flags2 & TG3_FLG2_5750_PLUS)
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GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5752)
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tp->tg3_flags2 |= TG3_FLG2_ASF_NEW_HANDSHAKE;
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tp->tg3_flags2 |= TG3_FLG2_ASF_NEW_HANDSHAKE;
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}
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}
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}
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}
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@ -5042,8 +5040,7 @@ static int tg3_reset_hw(struct tg3 *tp)
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tw32(GRC_MISC_CFG, val);
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tw32(GRC_MISC_CFG, val);
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/* Initialize MBUF/DESC pool. */
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/* Initialize MBUF/DESC pool. */
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if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5750 ||
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if (tp->tg3_flags2 & TG3_FLG2_5750_PLUS) {
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GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5752) {
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/* Do nothing. */
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/* Do nothing. */
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} else if (GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_5705) {
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} else if (GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_5705) {
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tw32(BUFMGR_MB_POOL_ADDR, NIC_SRAM_MBUF_POOL_BASE);
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tw32(BUFMGR_MB_POOL_ADDR, NIC_SRAM_MBUF_POOL_BASE);
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@ -7032,8 +7029,7 @@ static void __devinit tg3_get_nvram_info(struct tg3 *tp)
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tw32(NVRAM_CFG1, nvcfg1);
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tw32(NVRAM_CFG1, nvcfg1);
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}
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}
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if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5750 ||
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if (tp->tg3_flags2 & TG3_FLG2_5750_PLUS) {
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GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5752) {
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switch (nvcfg1 & NVRAM_CFG1_VENDOR_MASK) {
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switch (nvcfg1 & NVRAM_CFG1_VENDOR_MASK) {
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case FLASH_VENDOR_ATMEL_FLASH_BUFFERED:
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case FLASH_VENDOR_ATMEL_FLASH_BUFFERED:
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tp->nvram_jedecnum = JEDEC_ATMEL;
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tp->nvram_jedecnum = JEDEC_ATMEL;
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@ -7098,8 +7094,7 @@ static void __devinit tg3_nvram_init(struct tg3 *tp)
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GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_5701) {
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GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_5701) {
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tp->tg3_flags |= TG3_FLAG_NVRAM;
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tp->tg3_flags |= TG3_FLAG_NVRAM;
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if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5750 ||
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if (tp->tg3_flags2 & TG3_FLG2_5750_PLUS) {
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GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5752) {
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u32 nvaccess = tr32(NVRAM_ACCESS);
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u32 nvaccess = tr32(NVRAM_ACCESS);
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tw32(NVRAM_ACCESS, nvaccess | ACCESS_ENABLE);
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tw32(NVRAM_ACCESS, nvaccess | ACCESS_ENABLE);
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@ -7108,8 +7103,7 @@ static void __devinit tg3_nvram_init(struct tg3 *tp)
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tg3_get_nvram_info(tp);
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tg3_get_nvram_info(tp);
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tg3_get_nvram_size(tp);
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tg3_get_nvram_size(tp);
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if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5750 ||
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if (tp->tg3_flags2 & TG3_FLG2_5750_PLUS) {
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GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5752) {
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u32 nvaccess = tr32(NVRAM_ACCESS);
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u32 nvaccess = tr32(NVRAM_ACCESS);
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tw32(NVRAM_ACCESS, nvaccess & ~ACCESS_ENABLE);
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tw32(NVRAM_ACCESS, nvaccess & ~ACCESS_ENABLE);
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@ -7202,8 +7196,7 @@ static int tg3_nvram_read(struct tg3 *tp, u32 offset, u32 *val)
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tg3_nvram_lock(tp);
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tg3_nvram_lock(tp);
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if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5750 ||
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if (tp->tg3_flags2 & TG3_FLG2_5750_PLUS) {
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GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5752) {
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u32 nvaccess = tr32(NVRAM_ACCESS);
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u32 nvaccess = tr32(NVRAM_ACCESS);
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tw32_f(NVRAM_ACCESS, nvaccess | ACCESS_ENABLE);
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tw32_f(NVRAM_ACCESS, nvaccess | ACCESS_ENABLE);
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@ -7218,8 +7211,7 @@ static int tg3_nvram_read(struct tg3 *tp, u32 offset, u32 *val)
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tg3_nvram_unlock(tp);
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tg3_nvram_unlock(tp);
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if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5750 ||
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if (tp->tg3_flags2 & TG3_FLG2_5750_PLUS) {
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GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5752) {
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u32 nvaccess = tr32(NVRAM_ACCESS);
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u32 nvaccess = tr32(NVRAM_ACCESS);
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tw32_f(NVRAM_ACCESS, nvaccess & ~ACCESS_ENABLE);
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tw32_f(NVRAM_ACCESS, nvaccess & ~ACCESS_ENABLE);
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@ -7447,8 +7439,7 @@ static int tg3_nvram_write_block(struct tg3 *tp, u32 offset, u32 len, u8 *buf)
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tg3_nvram_lock(tp);
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tg3_nvram_lock(tp);
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if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5750 ||
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if (tp->tg3_flags2 & TG3_FLG2_5750_PLUS) {
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GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5752) {
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u32 nvaccess = tr32(NVRAM_ACCESS);
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u32 nvaccess = tr32(NVRAM_ACCESS);
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tw32(NVRAM_ACCESS, nvaccess | ACCESS_ENABLE);
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tw32(NVRAM_ACCESS, nvaccess | ACCESS_ENABLE);
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@ -7473,8 +7464,7 @@ static int tg3_nvram_write_block(struct tg3 *tp, u32 offset, u32 len, u8 *buf)
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grc_mode = tr32(GRC_MODE);
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grc_mode = tr32(GRC_MODE);
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tw32(GRC_MODE, grc_mode & ~GRC_MODE_NVRAM_WR_ENABLE);
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tw32(GRC_MODE, grc_mode & ~GRC_MODE_NVRAM_WR_ENABLE);
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if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5750 ||
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if (tp->tg3_flags2 & TG3_FLG2_5750_PLUS) {
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GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5752) {
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u32 nvaccess = tr32(NVRAM_ACCESS);
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u32 nvaccess = tr32(NVRAM_ACCESS);
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tw32(NVRAM_ACCESS, nvaccess & ~ACCESS_ENABLE);
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tw32(NVRAM_ACCESS, nvaccess & ~ACCESS_ENABLE);
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@ -7592,11 +7582,10 @@ static int __devinit tg3_phy_probe(struct tg3 *tp)
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} else
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} else
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eeprom_phy_id = 0;
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eeprom_phy_id = 0;
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if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5750 ||
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if (tp->tg3_flags2 & TG3_FLG2_5750_PLUS)
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GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5752) {
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led_cfg = cfg2 & (NIC_SRAM_DATA_CFG_LED_MODE_MASK |
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led_cfg = cfg2 & (NIC_SRAM_DATA_CFG_LED_MODE_MASK |
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SHASTA_EXT_LED_MODE_MASK);
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SHASTA_EXT_LED_MODE_MASK);
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} else
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else
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led_cfg = nic_cfg & NIC_SRAM_DATA_CFG_LED_MODE_MASK;
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led_cfg = nic_cfg & NIC_SRAM_DATA_CFG_LED_MODE_MASK;
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switch (led_cfg) {
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switch (led_cfg) {
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@ -7646,8 +7635,7 @@ static int __devinit tg3_phy_probe(struct tg3 *tp)
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if (nic_cfg & NIC_SRAM_DATA_CFG_ASF_ENABLE) {
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if (nic_cfg & NIC_SRAM_DATA_CFG_ASF_ENABLE) {
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tp->tg3_flags |= TG3_FLAG_ENABLE_ASF;
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tp->tg3_flags |= TG3_FLAG_ENABLE_ASF;
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if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5750 ||
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if (tp->tg3_flags2 & TG3_FLG2_5750_PLUS)
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GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5752)
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tp->tg3_flags2 |= TG3_FLG2_ASF_NEW_HANDSHAKE;
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tp->tg3_flags2 |= TG3_FLG2_ASF_NEW_HANDSHAKE;
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}
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}
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if (nic_cfg & NIC_SRAM_DATA_CFG_FIBER_WOL)
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if (nic_cfg & NIC_SRAM_DATA_CFG_FIBER_WOL)
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