mirror of
https://github.com/torvalds/linux.git
synced 2024-11-23 12:42:02 +00:00
ASoC: tlv320aic3x: Fix codec pll configure bug
In sound/soc/codecs/tlv320aic3x.c data = snd_soc_read(codec, AIC3X_PLL_PROGA_REG); snd_soc_write(codec, AIC3X_PLL_PROGA_REG, data | (pll_p << PLLP_SHIFT)); In the above code, pll-p value is OR'ed with previous value without clearing it. Bug is not seen if pll-p value doesn't change across Sampling frequency. However on some platforms (like AM335x EVM-SK), pll-p may have different values across different sampling frequencies. In such case, above code configures the pll with a wrong value. Because of this bug, when a audio stream is played with pll value different from previous stream, audio is heard as differently(like its stretched). Signed-off-by: Hebbar, Gururaja <gururaja.hebbar@ti.com> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com> Cc: stable@vger.kernel.org
This commit is contained in:
parent
b0dfa4541e
commit
c9fe573a65
@ -935,9 +935,7 @@ static int aic3x_hw_params(struct snd_pcm_substream *substream,
|
||||
}
|
||||
|
||||
found:
|
||||
data = snd_soc_read(codec, AIC3X_PLL_PROGA_REG);
|
||||
snd_soc_write(codec, AIC3X_PLL_PROGA_REG,
|
||||
data | (pll_p << PLLP_SHIFT));
|
||||
snd_soc_update_bits(codec, AIC3X_PLL_PROGA_REG, PLLP_MASK, pll_p);
|
||||
snd_soc_write(codec, AIC3X_OVRF_STATUS_AND_PLLR_REG,
|
||||
pll_r << PLLR_SHIFT);
|
||||
snd_soc_write(codec, AIC3X_PLL_PROGB_REG, pll_j << PLLJ_SHIFT);
|
||||
|
@ -166,6 +166,7 @@
|
||||
|
||||
/* PLL registers bitfields */
|
||||
#define PLLP_SHIFT 0
|
||||
#define PLLP_MASK 7
|
||||
#define PLLQ_SHIFT 3
|
||||
#define PLLR_SHIFT 0
|
||||
#define PLLJ_SHIFT 2
|
||||
|
Loading…
Reference in New Issue
Block a user