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drm/i915: Add a name for the Punit GPLLENABLE bit
Remove the magic number for the GPLLENABLE bit by adding a name for it. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by: Deepak S<deepak.s@linux.intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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@ -576,6 +576,7 @@ enum punit_power_well {
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#define PUNIT_REG_GPU_LFM 0xd3
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#define PUNIT_REG_GPU_FREQ_REQ 0xd4
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#define PUNIT_REG_GPU_FREQ_STS 0xd8
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#define GPLLENABLE (1<<4)
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#define GENFREQSTATUS (1<<0)
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#define PUNIT_REG_MEDIA_TURBO_FREQ_REQ 0xdc
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#define PUNIT_REG_CZ_TIMESTAMP 0xce
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@ -5333,7 +5333,7 @@ static void cherryview_enable_rps(struct drm_device *dev)
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val = vlv_punit_read(dev_priv, PUNIT_REG_GPU_FREQ_STS);
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DRM_DEBUG_DRIVER("GPLL enabled? %s\n", val & 0x10 ? "yes" : "no");
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DRM_DEBUG_DRIVER("GPLL enabled? %s\n", val & GPLLENABLE ? "yes" : "no");
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DRM_DEBUG_DRIVER("GPU status: 0x%08x\n", val);
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dev_priv->rps.cur_freq = (val >> 8) & 0xff;
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@ -5413,7 +5413,7 @@ static void valleyview_enable_rps(struct drm_device *dev)
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val = vlv_punit_read(dev_priv, PUNIT_REG_GPU_FREQ_STS);
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DRM_DEBUG_DRIVER("GPLL enabled? %s\n", val & 0x10 ? "yes" : "no");
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DRM_DEBUG_DRIVER("GPLL enabled? %s\n", val & GPLLENABLE ? "yes" : "no");
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DRM_DEBUG_DRIVER("GPU status: 0x%08x\n", val);
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dev_priv->rps.cur_freq = (val >> 8) & 0xff;
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