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i2c: rcar: faster irq code to minimize HW race condition
To avoid the HW race condition on R-Car Gen2 and earlier, we need to write to ICMCR as soon as possible in the interrupt handler. We can improve this by writing a static value instead of masking out bits. Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se> Signed-off-by: Wolfram Sang <wsa@kernel.org>
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@ -91,7 +91,6 @@
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#define RCAR_BUS_PHASE_START (MDBS | MIE | ESG)
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#define RCAR_BUS_PHASE_DATA (MDBS | MIE)
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#define RCAR_BUS_MASK_DATA (~(ESG | FSB) & 0xFF)
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#define RCAR_BUS_PHASE_STOP (MDBS | MIE | FSB)
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#define RCAR_IRQ_SEND (MNR | MAL | MST | MAT | MDE)
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@ -621,7 +620,7 @@ static bool rcar_i2c_slave_irq(struct rcar_i2c_priv *priv)
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/*
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* This driver has a lock-free design because there are IP cores (at least
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* R-Car Gen2) which have an inherent race condition in their hardware design.
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* There, we need to clear RCAR_BUS_MASK_DATA bits as soon as possible after
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* There, we need to switch to RCAR_BUS_PHASE_DATA as soon as possible after
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* the interrupt was generated, otherwise an unwanted repeated message gets
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* generated. It turned out that taking a spinlock at the beginning of the ISR
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* was already causing repeated messages. Thus, this driver was converted to
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@ -630,13 +629,11 @@ static bool rcar_i2c_slave_irq(struct rcar_i2c_priv *priv)
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static irqreturn_t rcar_i2c_irq(int irq, void *ptr)
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{
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struct rcar_i2c_priv *priv = ptr;
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u32 msr, val;
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u32 msr;
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/* Clear START or STOP immediately, except for REPSTART after read */
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if (likely(!(priv->flags & ID_P_REP_AFTER_RD))) {
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val = rcar_i2c_read(priv, ICMCR);
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rcar_i2c_write(priv, ICMCR, val & RCAR_BUS_MASK_DATA);
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}
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if (likely(!(priv->flags & ID_P_REP_AFTER_RD)))
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rcar_i2c_write(priv, ICMCR, RCAR_BUS_PHASE_DATA);
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msr = rcar_i2c_read(priv, ICMSR);
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