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Merge branch 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus
* 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus:
[MIPS] Terminally fix local_{dec,sub}_if_positive
[MIPS] Type proof reimplementation of cmpxchg.
[MIPS] pg-r4k.c: Fix a typo in an R4600 v2 erratum workaround
This commit is contained in:
Linus Torvalds
commit
c7659e2c13
@ -209,7 +209,7 @@ static inline void build_cdex_p(void)
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}
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if (R4600_V2_HIT_CACHEOP_WAR && cpu_is_r4600_v2_x())
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build_insn_word(0x3c01a000); /* lui $at, 0xa000 */
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build_insn_word(0x8c200000); /* lw $zero, ($at) */
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mi.c_format.opcode = cache_op;
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mi.c_format.rs = 4; /* $a0 */
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107
include/asm-mips/cmpxchg.h
Normal file
107
include/asm-mips/cmpxchg.h
Normal file
@ -0,0 +1,107 @@
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/*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*
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* Copyright (C) 2003, 06, 07 by Ralf Baechle (ralf@linux-mips.org)
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*/
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#ifndef __ASM_CMPXCHG_H
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#define __ASM_CMPXCHG_H
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#include <linux/irqflags.h>
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#define __HAVE_ARCH_CMPXCHG 1
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#define __cmpxchg_asm(ld, st, m, old, new) \
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({ \
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__typeof(*(m)) __ret; \
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\
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if (cpu_has_llsc && R10000_LLSC_WAR) { \
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__asm__ __volatile__( \
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" .set push \n" \
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" .set noat \n" \
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" .set mips3 \n" \
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"1: " ld " %0, %2 # __cmpxchg_asm \n" \
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" bne %0, %z3, 2f \n" \
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" .set mips0 \n" \
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" move $1, %z4 \n" \
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" .set mips3 \n" \
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" " st " $1, %1 \n" \
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" beqzl $1, 1b \n" \
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"2: \n" \
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" .set pop \n" \
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: "=&r" (__ret), "=R" (*m) \
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: "R" (*m), "Jr" (old), "Jr" (new) \
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: "memory"); \
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} else if (cpu_has_llsc) { \
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__asm__ __volatile__( \
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" .set push \n" \
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" .set noat \n" \
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" .set mips3 \n" \
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"1: " ld " %0, %2 # __cmpxchg_asm \n" \
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" bne %0, %z3, 2f \n" \
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" .set mips0 \n" \
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" move $1, %z4 \n" \
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" .set mips3 \n" \
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" " st " $1, %1 \n" \
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" beqz $1, 3f \n" \
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"2: \n" \
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" .subsection 2 \n" \
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"3: b 1b \n" \
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" .previous \n" \
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" .set pop \n" \
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: "=&r" (__ret), "=R" (*m) \
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: "R" (*m), "Jr" (old), "Jr" (new) \
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: "memory"); \
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} else { \
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unsigned long __flags; \
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\
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raw_local_irq_save(__flags); \
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__ret = *m; \
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if (__ret == old) \
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*m = new; \
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raw_local_irq_restore(__flags); \
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} \
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\
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__ret; \
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})
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/*
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* This function doesn't exist, so you'll get a linker error
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* if something tries to do an invalid cmpxchg().
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*/
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extern void __cmpxchg_called_with_bad_pointer(void);
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#define __cmpxchg(ptr,old,new,barrier) \
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({ \
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__typeof__(ptr) __ptr = (ptr); \
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__typeof__(*(ptr)) __old = (old); \
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__typeof__(*(ptr)) __new = (new); \
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__typeof__(*(ptr)) __res = 0; \
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\
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barrier; \
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\
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switch (sizeof(*(__ptr))) { \
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case 4: \
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__res = __cmpxchg_asm("ll", "sc", __ptr, __old, __new); \
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break; \
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case 8: \
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if (sizeof(long) == 8) { \
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__res = __cmpxchg_asm("lld", "scd", __ptr, \
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__old, __new); \
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break; \
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} \
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default: \
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__cmpxchg_called_with_bad_pointer(); \
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break; \
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} \
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\
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barrier; \
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\
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__res; \
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})
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#define cmpxchg(ptr, old, new) __cmpxchg(ptr, old, new, smp_llsc_mb())
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#define cmpxchg_local(ptr, old, new) __cmpxchg(ptr, old, new,)
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#endif /* __ASM_CMPXCHG_H */
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@ -4,6 +4,7 @@
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#include <linux/percpu.h>
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#include <linux/bitops.h>
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#include <asm/atomic.h>
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#include <asm/cmpxchg.h>
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#include <asm/war.h>
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typedef struct
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@ -114,68 +115,6 @@ static __inline__ long local_sub_return(long i, local_t * l)
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return result;
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}
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/*
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* local_sub_if_positive - conditionally subtract integer from atomic variable
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* @i: integer value to subtract
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* @l: pointer of type local_t
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*
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* Atomically test @l and subtract @i if @l is greater or equal than @i.
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* The function returns the old value of @l minus @i.
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*/
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static __inline__ long local_sub_if_positive(long i, local_t * l)
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{
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unsigned long result;
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if (cpu_has_llsc && R10000_LLSC_WAR) {
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unsigned long temp;
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__asm__ __volatile__(
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" .set mips3 \n"
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"1:" __LL "%1, %2 # local_sub_if_positive\n"
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" dsubu %0, %1, %3 \n"
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" bltz %0, 1f \n"
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__SC "%0, %2 \n"
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" .set noreorder \n"
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" beqzl %0, 1b \n"
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" dsubu %0, %1, %3 \n"
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" .set reorder \n"
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"1: \n"
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" .set mips0 \n"
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: "=&r" (result), "=&r" (temp), "=m" (l->a.counter)
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: "Ir" (i), "m" (l->a.counter)
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: "memory");
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} else if (cpu_has_llsc) {
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unsigned long temp;
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__asm__ __volatile__(
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" .set mips3 \n"
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"1:" __LL "%1, %2 # local_sub_if_positive\n"
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" dsubu %0, %1, %3 \n"
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" bltz %0, 1f \n"
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__SC "%0, %2 \n"
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" .set noreorder \n"
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" beqz %0, 1b \n"
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" dsubu %0, %1, %3 \n"
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" .set reorder \n"
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"1: \n"
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" .set mips0 \n"
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: "=&r" (result), "=&r" (temp), "=m" (l->a.counter)
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: "Ir" (i), "m" (l->a.counter)
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: "memory");
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} else {
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unsigned long flags;
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local_irq_save(flags);
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result = l->a.counter;
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result -= i;
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if (result >= 0)
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l->a.counter = result;
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local_irq_restore(flags);
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}
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return result;
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}
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#define local_cmpxchg(l, o, n) \
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((long)cmpxchg_local(&((l)->a.counter), (o), (n)))
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#define local_xchg(l, n) (xchg_local(&((l)->a.counter),(n)))
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@ -233,12 +172,6 @@ static __inline__ long local_sub_if_positive(long i, local_t * l)
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*/
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#define local_dec_and_test(l) (local_sub_return(1, (l)) == 0)
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/*
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* local_dec_if_positive - decrement by 1 if old value positive
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* @l: pointer of type local_t
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*/
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#define local_dec_if_positive(l) local_sub_if_positive(1, l)
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/*
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* local_add_negative - add and test if negative
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* @l: pointer of type local_t
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@ -17,6 +17,7 @@
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#include <asm/addrspace.h>
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#include <asm/barrier.h>
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#include <asm/cmpxchg.h>
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#include <asm/cpu-features.h>
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#include <asm/dsp.h>
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#include <asm/war.h>
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@ -194,266 +195,6 @@ static inline unsigned long __xchg(unsigned long x, volatile void * ptr, int siz
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#define xchg(ptr,x) ((__typeof__(*(ptr)))__xchg((unsigned long)(x),(ptr),sizeof(*(ptr))))
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#define __HAVE_ARCH_CMPXCHG 1
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static inline unsigned long __cmpxchg_u32(volatile int * m, unsigned long old,
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unsigned long new)
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{
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__u32 retval;
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if (cpu_has_llsc && R10000_LLSC_WAR) {
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__asm__ __volatile__(
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" .set push \n"
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" .set noat \n"
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" .set mips3 \n"
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"1: ll %0, %2 # __cmpxchg_u32 \n"
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" bne %0, %z3, 2f \n"
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" .set mips0 \n"
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" move $1, %z4 \n"
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" .set mips3 \n"
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" sc $1, %1 \n"
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" beqzl $1, 1b \n"
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"2: \n"
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" .set pop \n"
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: "=&r" (retval), "=R" (*m)
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: "R" (*m), "Jr" (old), "Jr" (new)
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: "memory");
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} else if (cpu_has_llsc) {
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__asm__ __volatile__(
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" .set push \n"
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" .set noat \n"
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" .set mips3 \n"
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"1: ll %0, %2 # __cmpxchg_u32 \n"
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" bne %0, %z3, 2f \n"
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" .set mips0 \n"
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" move $1, %z4 \n"
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" .set mips3 \n"
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" sc $1, %1 \n"
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" beqz $1, 3f \n"
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"2: \n"
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" .subsection 2 \n"
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"3: b 1b \n"
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" .previous \n"
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" .set pop \n"
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: "=&r" (retval), "=R" (*m)
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: "R" (*m), "Jr" (old), "Jr" (new)
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: "memory");
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} else {
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unsigned long flags;
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raw_local_irq_save(flags);
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retval = *m;
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if (retval == old)
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*m = new;
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raw_local_irq_restore(flags); /* implies memory barrier */
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}
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|
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smp_llsc_mb();
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|
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return retval;
|
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}
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static inline unsigned long __cmpxchg_u32_local(volatile int * m,
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unsigned long old, unsigned long new)
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{
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__u32 retval;
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if (cpu_has_llsc && R10000_LLSC_WAR) {
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__asm__ __volatile__(
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" .set push \n"
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" .set noat \n"
|
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" .set mips3 \n"
|
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"1: ll %0, %2 # __cmpxchg_u32 \n"
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" bne %0, %z3, 2f \n"
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" .set mips0 \n"
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" move $1, %z4 \n"
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" .set mips3 \n"
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" sc $1, %1 \n"
|
||||
" beqzl $1, 1b \n"
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"2: \n"
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" .set pop \n"
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||||
: "=&r" (retval), "=R" (*m)
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||||
: "R" (*m), "Jr" (old), "Jr" (new)
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||||
: "memory");
|
||||
} else if (cpu_has_llsc) {
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__asm__ __volatile__(
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||||
" .set push \n"
|
||||
" .set noat \n"
|
||||
" .set mips3 \n"
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||||
"1: ll %0, %2 # __cmpxchg_u32 \n"
|
||||
" bne %0, %z3, 2f \n"
|
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" .set mips0 \n"
|
||||
" move $1, %z4 \n"
|
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" .set mips3 \n"
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||||
" sc $1, %1 \n"
|
||||
" beqz $1, 1b \n"
|
||||
"2: \n"
|
||||
" .set pop \n"
|
||||
: "=&r" (retval), "=R" (*m)
|
||||
: "R" (*m), "Jr" (old), "Jr" (new)
|
||||
: "memory");
|
||||
} else {
|
||||
unsigned long flags;
|
||||
|
||||
local_irq_save(flags);
|
||||
retval = *m;
|
||||
if (retval == old)
|
||||
*m = new;
|
||||
local_irq_restore(flags); /* implies memory barrier */
|
||||
}
|
||||
|
||||
return retval;
|
||||
}
|
||||
|
||||
#ifdef CONFIG_64BIT
|
||||
static inline unsigned long __cmpxchg_u64(volatile int * m, unsigned long old,
|
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unsigned long new)
|
||||
{
|
||||
__u64 retval;
|
||||
|
||||
if (cpu_has_llsc && R10000_LLSC_WAR) {
|
||||
__asm__ __volatile__(
|
||||
" .set push \n"
|
||||
" .set noat \n"
|
||||
" .set mips3 \n"
|
||||
"1: lld %0, %2 # __cmpxchg_u64 \n"
|
||||
" bne %0, %z3, 2f \n"
|
||||
" move $1, %z4 \n"
|
||||
" scd $1, %1 \n"
|
||||
" beqzl $1, 1b \n"
|
||||
"2: \n"
|
||||
" .set pop \n"
|
||||
: "=&r" (retval), "=R" (*m)
|
||||
: "R" (*m), "Jr" (old), "Jr" (new)
|
||||
: "memory");
|
||||
} else if (cpu_has_llsc) {
|
||||
__asm__ __volatile__(
|
||||
" .set push \n"
|
||||
" .set noat \n"
|
||||
" .set mips3 \n"
|
||||
"1: lld %0, %2 # __cmpxchg_u64 \n"
|
||||
" bne %0, %z3, 2f \n"
|
||||
" move $1, %z4 \n"
|
||||
" scd $1, %1 \n"
|
||||
" beqz $1, 3f \n"
|
||||
"2: \n"
|
||||
" .subsection 2 \n"
|
||||
"3: b 1b \n"
|
||||
" .previous \n"
|
||||
" .set pop \n"
|
||||
: "=&r" (retval), "=R" (*m)
|
||||
: "R" (*m), "Jr" (old), "Jr" (new)
|
||||
: "memory");
|
||||
} else {
|
||||
unsigned long flags;
|
||||
|
||||
raw_local_irq_save(flags);
|
||||
retval = *m;
|
||||
if (retval == old)
|
||||
*m = new;
|
||||
raw_local_irq_restore(flags); /* implies memory barrier */
|
||||
}
|
||||
|
||||
smp_llsc_mb();
|
||||
|
||||
return retval;
|
||||
}
|
||||
|
||||
static inline unsigned long __cmpxchg_u64_local(volatile int * m,
|
||||
unsigned long old, unsigned long new)
|
||||
{
|
||||
__u64 retval;
|
||||
|
||||
if (cpu_has_llsc && R10000_LLSC_WAR) {
|
||||
__asm__ __volatile__(
|
||||
" .set push \n"
|
||||
" .set noat \n"
|
||||
" .set mips3 \n"
|
||||
"1: lld %0, %2 # __cmpxchg_u64 \n"
|
||||
" bne %0, %z3, 2f \n"
|
||||
" move $1, %z4 \n"
|
||||
" scd $1, %1 \n"
|
||||
" beqzl $1, 1b \n"
|
||||
"2: \n"
|
||||
" .set pop \n"
|
||||
: "=&r" (retval), "=R" (*m)
|
||||
: "R" (*m), "Jr" (old), "Jr" (new)
|
||||
: "memory");
|
||||
} else if (cpu_has_llsc) {
|
||||
__asm__ __volatile__(
|
||||
" .set push \n"
|
||||
" .set noat \n"
|
||||
" .set mips3 \n"
|
||||
"1: lld %0, %2 # __cmpxchg_u64 \n"
|
||||
" bne %0, %z3, 2f \n"
|
||||
" move $1, %z4 \n"
|
||||
" scd $1, %1 \n"
|
||||
" beqz $1, 1b \n"
|
||||
"2: \n"
|
||||
" .set pop \n"
|
||||
: "=&r" (retval), "=R" (*m)
|
||||
: "R" (*m), "Jr" (old), "Jr" (new)
|
||||
: "memory");
|
||||
} else {
|
||||
unsigned long flags;
|
||||
|
||||
local_irq_save(flags);
|
||||
retval = *m;
|
||||
if (retval == old)
|
||||
*m = new;
|
||||
local_irq_restore(flags); /* implies memory barrier */
|
||||
}
|
||||
|
||||
return retval;
|
||||
}
|
||||
|
||||
#else
|
||||
extern unsigned long __cmpxchg_u64_unsupported_on_32bit_kernels(
|
||||
volatile int * m, unsigned long old, unsigned long new);
|
||||
#define __cmpxchg_u64 __cmpxchg_u64_unsupported_on_32bit_kernels
|
||||
extern unsigned long __cmpxchg_u64_local_unsupported_on_32bit_kernels(
|
||||
volatile int * m, unsigned long old, unsigned long new);
|
||||
#define __cmpxchg_u64_local __cmpxchg_u64_local_unsupported_on_32bit_kernels
|
||||
#endif
|
||||
|
||||
/* This function doesn't exist, so you'll get a linker error
|
||||
if something tries to do an invalid cmpxchg(). */
|
||||
extern void __cmpxchg_called_with_bad_pointer(void);
|
||||
|
||||
static inline unsigned long __cmpxchg(volatile void * ptr, unsigned long old,
|
||||
unsigned long new, int size)
|
||||
{
|
||||
switch (size) {
|
||||
case 4:
|
||||
return __cmpxchg_u32(ptr, old, new);
|
||||
case 8:
|
||||
return __cmpxchg_u64(ptr, old, new);
|
||||
}
|
||||
__cmpxchg_called_with_bad_pointer();
|
||||
return old;
|
||||
}
|
||||
|
||||
static inline unsigned long __cmpxchg_local(volatile void * ptr,
|
||||
unsigned long old, unsigned long new, int size)
|
||||
{
|
||||
switch (size) {
|
||||
case 4:
|
||||
return __cmpxchg_u32_local(ptr, old, new);
|
||||
case 8:
|
||||
return __cmpxchg_u64_local(ptr, old, new);
|
||||
}
|
||||
__cmpxchg_called_with_bad_pointer();
|
||||
return old;
|
||||
}
|
||||
|
||||
#define cmpxchg(ptr,old,new) \
|
||||
((__typeof__(*(ptr)))__cmpxchg((ptr), \
|
||||
(unsigned long)(old), (unsigned long)(new),sizeof(*(ptr))))
|
||||
|
||||
#define cmpxchg_local(ptr,old,new) \
|
||||
((__typeof__(*(ptr)))__cmpxchg_local((ptr), \
|
||||
(unsigned long)(old), (unsigned long)(new),sizeof(*(ptr))))
|
||||
|
||||
extern void set_handler (unsigned long offset, void *addr, unsigned long len);
|
||||
extern void set_uncached_handler (unsigned long offset, void *addr, unsigned long len);
|
||||
|
||||
|
||||
Loading…
Reference in New Issue
Block a user