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[POWERPC] Oprofile cleanup

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Clean up the ctr_read/write a bit. It's currently defined in the
include but only used in one C file each. The only exception is the
classic version, so keep that in the include and define in the C file
as appropriate.

Signed-off-by: Olof Johansson <olof@lixom.net>
Signed-off-by: Paul Mackerras <paulus@samba.org>
This commit is contained in:
Olof Johansson 2007-01-28 21:23:14 -06:00 committed by Paul Mackerras
parent 4942bd80e8
commit c69b767a2c
5 changed files with 98 additions and 102 deletions
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10
arch/powerpc/oprofile/op_model_7450.c
View File

@ -137,9 +137,9 @@ static void fsl7450_start(struct op_counter_config *ctr)
for (i = 0; i < NUM_CTRS; ++i) {
if (ctr[i].enabled)
ctr_write(i, reset_value[i]);
classic_ctr_write(i, reset_value[i]);
else
ctr_write(i, 0);
classic_ctr_write(i, 0);
}
/* Clear the freeze bit, and enable the interrupt.
@ -179,13 +179,13 @@ static void fsl7450_handle_interrupt(struct pt_regs *regs,
is_kernel = is_kernel_addr(pc);
for (i = 0; i < NUM_CTRS; ++i) {
val = ctr_read(i);
val = classic_ctr_read(i);
if (val < 0) {
if (oprofile_running && ctr[i].enabled) {
oprofile_add_ext_sample(pc, regs, i, is_kernel);
ctr_write(i, reset_value[i]);
classic_ctr_write(i, reset_value[i]);
} else {
ctr_write(i, 0);
classic_ctr_write(i, 0);
}
}
}

81
arch/powerpc/oprofile/op_model_fsl_booke.c
View File

@ -32,6 +32,87 @@ static unsigned long reset_value[OP_MAX_COUNTER];
static int num_counters;
static int oprofile_running;
static inline u32 get_pmlca(int ctr)
{
u32 pmlca;
switch (ctr) {
case 0:
pmlca = mfpmr(PMRN_PMLCA0);
break;
case 1:
pmlca = mfpmr(PMRN_PMLCA1);
break;
case 2:
pmlca = mfpmr(PMRN_PMLCA2);
break;
case 3:
pmlca = mfpmr(PMRN_PMLCA3);
break;
default:
panic("Bad ctr number\n");
}
return pmlca;
}
static inline void set_pmlca(int ctr, u32 pmlca)
{
switch (ctr) {
case 0:
mtpmr(PMRN_PMLCA0, pmlca);
break;
case 1:
mtpmr(PMRN_PMLCA1, pmlca);
break;
case 2:
mtpmr(PMRN_PMLCA2, pmlca);
break;
case 3:
mtpmr(PMRN_PMLCA3, pmlca);
break;
default:
panic("Bad ctr number\n");
}
}
static inline unsigned int ctr_read(unsigned int i)
{
switch(i) {
case 0:
return mfpmr(PMRN_PMC0);
case 1:
return mfpmr(PMRN_PMC1);
case 2:
return mfpmr(PMRN_PMC2);
case 3:
return mfpmr(PMRN_PMC3);
default:
return 0;
}
}
static inline void ctr_write(unsigned int i, unsigned int val)
{
switch(i) {
case 0:
mtpmr(PMRN_PMC0, val);
break;
case 1:
mtpmr(PMRN_PMC1, val);
break;
case 2:
mtpmr(PMRN_PMC2, val);
break;
case 3:
mtpmr(PMRN_PMC3, val);
break;
default:
break;
}
}
static void init_pmc_stop(int ctr)
{
u32 pmlca = (PMLCA_FC | PMLCA_FCS | PMLCA_FCU |

10
arch/powerpc/oprofile/op_model_power4.c
View File

@ -121,9 +121,9 @@ static void power4_start(struct op_counter_config *ctr)
for (i = 0; i < cur_cpu_spec->num_pmcs; ++i) {
if (ctr[i].enabled) {
ctr_write(i, reset_value[i]);
classic_ctr_write(i, reset_value[i]);
} else {
ctr_write(i, 0);
classic_ctr_write(i, 0);
}
}
@ -254,13 +254,13 @@ static void power4_handle_interrupt(struct pt_regs *regs,
mtmsrd(mfmsr() | MSR_PMM);
for (i = 0; i < cur_cpu_spec->num_pmcs; ++i) {
val = ctr_read(i);
val = classic_ctr_read(i);
if (val < 0) {
if (oprofile_running && ctr[i].enabled) {
oprofile_add_ext_sample(pc, regs, i, is_kernel);
ctr_write(i, reset_value[i]);
classic_ctr_write(i, reset_value[i]);
} else {
ctr_write(i, 0);
classic_ctr_write(i, 0);
}
}
}

10
arch/powerpc/oprofile/op_model_rs64.c
View File

@ -137,10 +137,10 @@ static void rs64_start(struct op_counter_config *ctr)
for (i = 0; i < num_counters; ++i) {
if (ctr[i].enabled) {
ctr_write(i, reset_value[i]);
classic_ctr_write(i, reset_value[i]);
ctrl_write(i, ctr[i].event);
} else {
ctr_write(i, 0);
classic_ctr_write(i, 0);
}
}
@ -186,13 +186,13 @@ static void rs64_handle_interrupt(struct pt_regs *regs,
mtmsrd(mfmsr() | MSR_PMM);
for (i = 0; i < num_counters; ++i) {
val = ctr_read(i);
val = classic_ctr_read(i);
if (val < 0) {
if (ctr[i].enabled) {
oprofile_add_ext_sample(pc, regs, i, is_kernel);
ctr_write(i, reset_value[i]);
classic_ctr_write(i, reset_value[i]);
} else {
ctr_write(i, 0);
classic_ctr_write(i, 0);
}
}
}

89
include/asm-powerpc/oprofile_impl.h
View File

@ -58,10 +58,8 @@ extern struct op_powerpc_model op_model_power4;
extern struct op_powerpc_model op_model_7450;
extern struct op_powerpc_model op_model_cell;
#ifndef CONFIG_FSL_BOOKE
/* All the classic PPC parts use these */
static inline unsigned int ctr_read(unsigned int i)
static inline unsigned int classic_ctr_read(unsigned int i)
{
switch(i) {
case 0:
@ -89,7 +87,7 @@ static inline unsigned int ctr_read(unsigned int i)
}
}
static inline void ctr_write(unsigned int i, unsigned int val)
static inline void classic_ctr_write(unsigned int i, unsigned int val)
{
switch(i) {
case 0:
@ -124,89 +122,6 @@ static inline void ctr_write(unsigned int i, unsigned int val)
break;
}
}
#else /* CONFIG_FSL_BOOKE */
static inline u32 get_pmlca(int ctr)
{
u32 pmlca;
switch (ctr) {
case 0:
pmlca = mfpmr(PMRN_PMLCA0);
break;
case 1:
pmlca = mfpmr(PMRN_PMLCA1);
break;
case 2:
pmlca = mfpmr(PMRN_PMLCA2);
break;
case 3:
pmlca = mfpmr(PMRN_PMLCA3);
break;
default:
panic("Bad ctr number\n");
}
return pmlca;
}
static inline void set_pmlca(int ctr, u32 pmlca)
{
switch (ctr) {
case 0:
mtpmr(PMRN_PMLCA0, pmlca);
break;
case 1:
mtpmr(PMRN_PMLCA1, pmlca);
break;
case 2:
mtpmr(PMRN_PMLCA2, pmlca);
break;
case 3:
mtpmr(PMRN_PMLCA3, pmlca);
break;
default:
panic("Bad ctr number\n");
}
}
static inline unsigned int ctr_read(unsigned int i)
{
switch(i) {
case 0:
return mfpmr(PMRN_PMC0);
case 1:
return mfpmr(PMRN_PMC1);
case 2:
return mfpmr(PMRN_PMC2);
case 3:
return mfpmr(PMRN_PMC3);
default:
return 0;
}
}
static inline void ctr_write(unsigned int i, unsigned int val)
{
switch(i) {
case 0:
mtpmr(PMRN_PMC0, val);
break;
case 1:
mtpmr(PMRN_PMC1, val);
break;
case 2:
mtpmr(PMRN_PMC2, val);
break;
case 3:
mtpmr(PMRN_PMC3, val);
break;
default:
break;
}
}
#endif /* CONFIG_FSL_BOOKE */
extern void op_powerpc_backtrace(struct pt_regs * const regs, unsigned int depth);