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hwspinlock updates for 5.9

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This introduces a new DT binding format to describe the Qualcomm
 hardware mutex block and deprecates the old, invalid, one.
 
 It also cleans up the Kconfig slightly.
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Merge tag 'hwlock-v5.9' of git://git.kernel.org/pub/scm/linux/kernel/git/andersson/remoteproc

Pull hwspinlock updates from Bjorn Andersson:
 "This introduces a new DT binding format to describe the Qualcomm
  hardware mutex block and deprecates the old, invalid, one.

  It also cleans up the Kconfig slightly"

* tag 'hwlock-v5.9' of git://git.kernel.org/pub/scm/linux/kernel/git/andersson/remoteproc:
  dt-bindings: hwlock: qcom: Remove invalid binding
  hwspinlock: qcom: Allow mmio usage in addition to syscon
  dt-bindings: hwlock: qcom: Allow device on mmio bus
  dt-bindings: hwlock: qcom: Migrate binding to YAML
  hwspinlock: Simplify Kconfig
This commit is contained in:
Linus Torvalds 2020-08-11 11:53:34 -07:00
commit c636eef2ee
4 changed files with 105 additions and 66 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

39
Documentation/devicetree/bindings/hwlock/qcom-hwspinlock.txt
View File

@ -1,39 +0,0 @@
Qualcomm Hardware Mutex Block:
The hardware block provides mutexes utilized between different processors on
the SoC as part of the communication protocol used by these processors.
- compatible:
Usage: required
Value type: <string>
Definition: must be one of:
"qcom,sfpb-mutex",
"qcom,tcsr-mutex"
- syscon:
Usage: required
Value type: <prop-encoded-array>
Definition: one cell containing:
syscon phandle
offset of the hwmutex block within the syscon
stride of the hwmutex registers
- #hwlock-cells:
Usage: required
Value type: <u32>
Definition: must be 1, the specified cell represent the lock id
(hwlock standard property, see hwlock.txt)
Example:
tcsr_mutex_block: syscon@fd484000 {
compatible = "syscon";
reg = <0xfd484000 0x2000>;
};
hwlock@fd484000 {
compatible = "qcom,tcsr-mutex";
syscon = <&tcsr_mutex_block 0 0x80>;
#hwlock-cells = <1>;
};

42
Documentation/devicetree/bindings/hwlock/qcom-hwspinlock.yaml Normal file
View File

@ -0,0 +1,42 @@
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/hwlock/qcom-hwspinlock.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Qualcomm Hardware Mutex Block
maintainers:
- Bjorn Andersson <bjorn.andersson@linaro.org>
description:
The hardware block provides mutexes utilized between different processors on
the SoC as part of the communication protocol used by these processors.
properties:
compatible:
enum:
- qcom,sfpb-mutex
- qcom,tcsr-mutex
reg:
maxItems: 1
'#hwlock-cells':
const: 1
required:
- compatible
- reg
- '#hwlock-cells'
additionalProperties: false
examples:
- |
tcsr_mutex: hwlock@1f40000 {
compatible = "qcom,tcsr-mutex";
reg = <0x01f40000 0x40000>;
#hwlock-cells = <1>;
};
...

10
drivers/hwspinlock/Kconfig
View File

@ -6,9 +6,10 @@
menuconfig HWSPINLOCK
bool "Hardware Spinlock drivers"
if HWSPINLOCK
config HWSPINLOCK_OMAP
tristate "OMAP Hardware Spinlock device"
depends on HWSPINLOCK
depends on ARCH_OMAP4 || SOC_OMAP5 || SOC_DRA7XX || SOC_AM33XX || SOC_AM43XX || ARCH_K3 || COMPILE_TEST
help
Say y here to support the OMAP Hardware Spinlock device (firstly
@ -18,7 +19,6 @@ config HWSPINLOCK_OMAP
config HWSPINLOCK_QCOM
tristate "Qualcomm Hardware Spinlock device"
depends on HWSPINLOCK
depends on ARCH_QCOM || COMPILE_TEST
select MFD_SYSCON
help
@ -30,7 +30,6 @@ config HWSPINLOCK_QCOM
config HWSPINLOCK_SIRF
tristate "SIRF Hardware Spinlock device"
depends on HWSPINLOCK
depends on ARCH_SIRF || COMPILE_TEST
help
Say y here to support the SIRF Hardware Spinlock device, which
@ -43,7 +42,6 @@ config HWSPINLOCK_SIRF
config HWSPINLOCK_SPRD
tristate "SPRD Hardware Spinlock device"
depends on ARCH_SPRD || COMPILE_TEST
depends on HWSPINLOCK
help
Say y here to support the SPRD Hardware Spinlock device.
@ -52,7 +50,6 @@ config HWSPINLOCK_SPRD
config HWSPINLOCK_STM32
tristate "STM32 Hardware Spinlock device"
depends on MACH_STM32MP157 || COMPILE_TEST
depends on HWSPINLOCK
help
Say y here to support the STM32 Hardware Spinlock device.
@ -60,7 +57,6 @@ config HWSPINLOCK_STM32
config HSEM_U8500
tristate "STE Hardware Semaphore functionality"
depends on HWSPINLOCK
depends on ARCH_U8500 || COMPILE_TEST
help
Say y here to support the STE Hardware Semaphore functionality, which
@ -68,3 +64,5 @@ config HSEM_U8500
SoC.
If unsure, say N.
endif # HWSPINLOCK

80
drivers/hwspinlock/qcom_hwspinlock.c
View File

@ -70,41 +70,79 @@ static const struct of_device_id qcom_hwspinlock_of_match[] = {
};
MODULE_DEVICE_TABLE(of, qcom_hwspinlock_of_match);
static struct regmap *qcom_hwspinlock_probe_syscon(struct platform_device *pdev,
u32 *base, u32 *stride)
{
struct device_node *syscon;
struct regmap *regmap;
int ret;
syscon = of_parse_phandle(pdev->dev.of_node, "syscon", 0);
if (!syscon)
return ERR_PTR(-ENODEV);
regmap = syscon_node_to_regmap(syscon);
of_node_put(syscon);
if (IS_ERR(regmap))
return regmap;
ret = of_property_read_u32_index(pdev->dev.of_node, "syscon", 1, base);
if (ret < 0) {
dev_err(&pdev->dev, "no offset in syscon\n");
return ERR_PTR(-EINVAL);
}
ret = of_property_read_u32_index(pdev->dev.of_node, "syscon", 2, stride);
if (ret < 0) {
dev_err(&pdev->dev, "no stride syscon\n");
return ERR_PTR(-EINVAL);
}
return regmap;
}
static const struct regmap_config tcsr_mutex_config = {
.reg_bits = 32,
.reg_stride = 4,
.val_bits = 32,
.max_register = 0x40000,
.fast_io = true,
};
static struct regmap *qcom_hwspinlock_probe_mmio(struct platform_device *pdev,
u32 *offset, u32 *stride)
{
struct device *dev = &pdev->dev;
void __iomem *base;
/* All modern platform has offset 0 and stride of 4k */
*offset = 0;
*stride = 0x1000;
base = devm_platform_ioremap_resource(pdev, 0);
if (IS_ERR(base))
return ERR_CAST(base);
return devm_regmap_init_mmio(dev, base, &tcsr_mutex_config);
}
static int qcom_hwspinlock_probe(struct platform_device *pdev)
{
struct hwspinlock_device *bank;
struct device_node *syscon;
struct reg_field field;
struct regmap *regmap;
size_t array_size;
u32 stride;
u32 base;
int ret;
int i;
syscon = of_parse_phandle(pdev->dev.of_node, "syscon", 0);
if (!syscon) {
dev_err(&pdev->dev, "no syscon property\n");
return -ENODEV;
}
regmap = qcom_hwspinlock_probe_syscon(pdev, &base, &stride);
if (IS_ERR(regmap) && PTR_ERR(regmap) == -ENODEV)
regmap = qcom_hwspinlock_probe_mmio(pdev, &base, &stride);
regmap = syscon_node_to_regmap(syscon);
of_node_put(syscon);
if (IS_ERR(regmap))
return PTR_ERR(regmap);
ret = of_property_read_u32_index(pdev->dev.of_node, "syscon", 1, &base);
if (ret < 0) {
dev_err(&pdev->dev, "no offset in syscon\n");
return -EINVAL;
}
ret = of_property_read_u32_index(pdev->dev.of_node, "syscon", 2, &stride);
if (ret < 0) {
dev_err(&pdev->dev, "no stride syscon\n");
return -EINVAL;
}
array_size = QCOM_MUTEX_NUM_LOCKS * sizeof(struct hwspinlock);
bank = devm_kzalloc(&pdev->dev, sizeof(*bank) + array_size, GFP_KERNEL);
if (!bank)