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drm/radeon/kms/evergreen: emit SQ_LDS_RESOURCE_MGMT for blits
Compute drivers may change this, so make sure to emit it to avoid errors in bo blits. Fixes: https://bugs.freedesktop.org/show_bug.cgi?id=39119 Signed-off-by: Alex Deucher <alexdeucher@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
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@ -252,7 +252,7 @@ draw_auto(struct radeon_device *rdev)
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}
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/* emits 36 */
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/* emits 39 */
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static void
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set_default_state(struct radeon_device *rdev)
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{
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@ -531,6 +531,11 @@ set_default_state(struct radeon_device *rdev)
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radeon_ring_write(rdev, (SQ_DYN_GPR_CNTL_PS_FLUSH_REQ - PACKET3_SET_CONFIG_REG_START) >> 2);
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radeon_ring_write(rdev, 0);
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/* setup LDS */
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radeon_ring_write(rdev, PACKET3(PACKET3_SET_CONFIG_REG, 1));
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radeon_ring_write(rdev, (SQ_LDS_RESOURCE_MGMT - PACKET3_SET_CONFIG_REG_START) >> 2);
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radeon_ring_write(rdev, 0x10001000);
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/* SQ config */
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radeon_ring_write(rdev, PACKET3(PACKET3_SET_CONFIG_REG, 11));
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radeon_ring_write(rdev, (SQ_CONFIG - PACKET3_SET_CONFIG_REG_START) >> 2);
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@ -773,7 +778,7 @@ int evergreen_blit_prepare_copy(struct radeon_device *rdev, int size_bytes)
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/* calculate number of loops correctly */
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ring_size = num_loops * dwords_per_loop;
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/* set default + shaders */
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ring_size += 52; /* shaders + def state */
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ring_size += 55; /* shaders + def state */
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ring_size += 10; /* fence emit for VB IB */
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ring_size += 5; /* done copy */
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ring_size += 10; /* fence emit for done copy */
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