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xhci: host: Add Renesas RZ/V2M SoC support
RZ/V2M is similar to R-Car XHCI but it doesn't require any firmware, we need to reset the USB Host reset release in DRD Module before accessing host registers. Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Link: https://lore.kernel.org/r/20230121145853.4792-10-biju.das.jz@bp.renesas.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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@ -54,6 +54,7 @@ config USB_XHCI_PCI_RENESAS
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config USB_XHCI_PLATFORM
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config USB_XHCI_PLATFORM
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tristate "Generic xHCI driver for a platform device"
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tristate "Generic xHCI driver for a platform device"
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select USB_XHCI_RCAR if ARCH_RENESAS
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select USB_XHCI_RCAR if ARCH_RENESAS
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select USB_XHCI_RZV2M if ARCH_R9A09G011
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help
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help
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Adds an xHCI host driver for a generic platform device, which
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Adds an xHCI host driver for a generic platform device, which
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provides a memory space and an irq.
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provides a memory space and an irq.
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@ -95,6 +96,15 @@ config USB_XHCI_RCAR
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Say 'Y' to enable the support for the xHCI host controller
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Say 'Y' to enable the support for the xHCI host controller
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found in Renesas R-Car ARM SoCs.
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found in Renesas R-Car ARM SoCs.
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config USB_XHCI_RZV2M
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tristate "xHCI support for Renesas RZ/V2M SoC"
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depends on USB_XHCI_PLATFORM
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depends on ARCH_R9A09G011 || COMPILE_TEST
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select USB_RZV2M_USB3DRD
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help
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Say 'Y' to enable the support for the xHCI host controller
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found in Renesas RZ/V2M SoC.
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config USB_XHCI_TEGRA
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config USB_XHCI_TEGRA
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tristate "xHCI support for NVIDIA Tegra SoCs"
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tristate "xHCI support for NVIDIA Tegra SoCs"
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depends on PHY_TEGRA_XUSB
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depends on PHY_TEGRA_XUSB
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@ -28,6 +28,9 @@ endif
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ifneq ($(CONFIG_USB_XHCI_RCAR), )
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ifneq ($(CONFIG_USB_XHCI_RCAR), )
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xhci-plat-hcd-y += xhci-rcar.o
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xhci-plat-hcd-y += xhci-rcar.o
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endif
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endif
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ifneq ($(CONFIG_USB_XHCI_RZV2M), )
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xhci-plat-hcd-y += xhci-rzv2m.o
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endif
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ifneq ($(CONFIG_DEBUG_FS),)
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ifneq ($(CONFIG_DEBUG_FS),)
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xhci-hcd-y += xhci-debugfs.o
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xhci-hcd-y += xhci-debugfs.o
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@ -25,6 +25,7 @@
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#include "xhci-plat.h"
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#include "xhci-plat.h"
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#include "xhci-mvebu.h"
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#include "xhci-mvebu.h"
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#include "xhci-rcar.h"
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#include "xhci-rcar.h"
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#include "xhci-rzv2m.h"
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static struct hc_driver __read_mostly xhci_plat_hc_driver;
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static struct hc_driver __read_mostly xhci_plat_hc_driver;
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@ -123,6 +124,13 @@ static const struct xhci_plat_priv xhci_plat_renesas_rcar_gen3 = {
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SET_XHCI_PLAT_PRIV_FOR_RCAR(XHCI_RCAR_FIRMWARE_NAME_V3)
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SET_XHCI_PLAT_PRIV_FOR_RCAR(XHCI_RCAR_FIRMWARE_NAME_V3)
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};
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};
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static const struct xhci_plat_priv xhci_plat_renesas_rzv2m = {
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.quirks = XHCI_NO_64BIT_SUPPORT | XHCI_TRUST_TX_LENGTH |
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XHCI_SLOW_SUSPEND,
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.init_quirk = xhci_rzv2m_init_quirk,
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.plat_start = xhci_rzv2m_start,
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};
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static const struct xhci_plat_priv xhci_plat_brcm = {
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static const struct xhci_plat_priv xhci_plat_brcm = {
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.quirks = XHCI_RESET_ON_RESUME | XHCI_SUSPEND_RESUME_CLKS,
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.quirks = XHCI_RESET_ON_RESUME | XHCI_SUSPEND_RESUME_CLKS,
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};
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};
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@ -162,6 +170,9 @@ static const struct of_device_id usb_xhci_of_match[] = {
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}, {
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}, {
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.compatible = "renesas,rcar-gen3-xhci",
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.compatible = "renesas,rcar-gen3-xhci",
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.data = &xhci_plat_renesas_rcar_gen3,
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.data = &xhci_plat_renesas_rcar_gen3,
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}, {
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.compatible = "renesas,rzv2m-xhci",
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.data = &xhci_plat_renesas_rzv2m,
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}, {
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}, {
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.compatible = "brcm,xhci-brcm-v2",
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.compatible = "brcm,xhci-brcm-v2",
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.data = &xhci_plat_brcm,
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.data = &xhci_plat_brcm,
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38
drivers/usb/host/xhci-rzv2m.c
Normal file
38
drivers/usb/host/xhci-rzv2m.c
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@ -0,0 +1,38 @@
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// SPDX-License-Identifier: GPL-2.0
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/*
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* xHCI host controller driver for RZ/V2M
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*
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* Copyright (C) 2022 Renesas Electronics Corporation
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*/
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#include <linux/usb/rzv2m_usb3drd.h>
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#include "xhci-plat.h"
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#include "xhci-rzv2m.h"
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#define RZV2M_USB3_INTEN 0x1044 /* Interrupt Enable */
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#define RZV2M_USB3_INT_XHC_ENA BIT(0)
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#define RZV2M_USB3_INT_HSE_ENA BIT(2)
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#define RZV2M_USB3_INT_ENA_VAL (RZV2M_USB3_INT_XHC_ENA \
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| RZV2M_USB3_INT_HSE_ENA)
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int xhci_rzv2m_init_quirk(struct usb_hcd *hcd)
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{
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struct device *dev = hcd->self.controller;
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rzv2m_usb3drd_reset(dev->parent, true);
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return 0;
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}
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void xhci_rzv2m_start(struct usb_hcd *hcd)
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{
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u32 int_en;
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if (hcd->regs) {
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/* Interrupt Enable */
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int_en = readl(hcd->regs + RZV2M_USB3_INTEN);
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int_en |= RZV2M_USB3_INT_ENA_VAL;
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writel(int_en, hcd->regs + RZV2M_USB3_INTEN);
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}
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}
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16
drivers/usb/host/xhci-rzv2m.h
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16
drivers/usb/host/xhci-rzv2m.h
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@ -0,0 +1,16 @@
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/* SPDX-License-Identifier: GPL-2.0 */
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#ifndef __XHCI_RZV2M_H
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#define __XHCI_RZV2M_H
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#if IS_ENABLED(CONFIG_USB_XHCI_RZV2M)
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void xhci_rzv2m_start(struct usb_hcd *hcd);
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int xhci_rzv2m_init_quirk(struct usb_hcd *hcd);
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#else
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static inline void xhci_rzv2m_start(struct usb_hcd *hcd) {}
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static inline int xhci_rzv2m_init_quirk(struct usb_hcd *hcd)
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{
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return -EINVAL;
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}
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#endif
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#endif /* __XHCI_RZV2M_H */
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