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xhci: host: Add Renesas RZ/V2M SoC support

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RZ/V2M is similar to R-Car XHCI but it doesn't require any
firmware, we need to reset the USB Host reset release in DRD Module
before accessing host registers.

Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Link: https://lore.kernel.org/r/20230121145853.4792-10-biju.das.jz@bp.renesas.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This commit is contained in:
Biju Das 2023-01-21 14:58:50 +00:00 committed by Greg Kroah-Hartman
parent 224eb5311d
commit c52c9acc41
5 changed files with 78 additions and 0 deletions
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10
drivers/usb/host/Kconfig
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@ -54,6 +54,7 @@ config USB_XHCI_PCI_RENESAS
config USB_XHCI_PLATFORM
tristate "Generic xHCI driver for a platform device"
select USB_XHCI_RCAR if ARCH_RENESAS
select USB_XHCI_RZV2M if ARCH_R9A09G011
help
Adds an xHCI host driver for a generic platform device, which
provides a memory space and an irq.
@ -95,6 +96,15 @@ config USB_XHCI_RCAR
Say 'Y' to enable the support for the xHCI host controller
found in Renesas R-Car ARM SoCs.
config USB_XHCI_RZV2M
tristate "xHCI support for Renesas RZ/V2M SoC"
depends on USB_XHCI_PLATFORM
depends on ARCH_R9A09G011 || COMPILE_TEST
select USB_RZV2M_USB3DRD
help
Say 'Y' to enable the support for the xHCI host controller
found in Renesas RZ/V2M SoC.
config USB_XHCI_TEGRA
tristate "xHCI support for NVIDIA Tegra SoCs"
depends on PHY_TEGRA_XUSB

3
drivers/usb/host/Makefile
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@ -28,6 +28,9 @@ endif
ifneq ($(CONFIG_USB_XHCI_RCAR), )
xhci-plat-hcd-y += xhci-rcar.o
endif
ifneq ($(CONFIG_USB_XHCI_RZV2M), )
xhci-plat-hcd-y += xhci-rzv2m.o
endif
ifneq ($(CONFIG_DEBUG_FS),)
xhci-hcd-y += xhci-debugfs.o

11
drivers/usb/host/xhci-plat.c
View File

@ -25,6 +25,7 @@
#include "xhci-plat.h"
#include "xhci-mvebu.h"
#include "xhci-rcar.h"
#include "xhci-rzv2m.h"
static struct hc_driver __read_mostly xhci_plat_hc_driver;
@ -123,6 +124,13 @@ static const struct xhci_plat_priv xhci_plat_renesas_rcar_gen3 = {
SET_XHCI_PLAT_PRIV_FOR_RCAR(XHCI_RCAR_FIRMWARE_NAME_V3)
};
static const struct xhci_plat_priv xhci_plat_renesas_rzv2m = {
.quirks = XHCI_NO_64BIT_SUPPORT | XHCI_TRUST_TX_LENGTH |
XHCI_SLOW_SUSPEND,
.init_quirk = xhci_rzv2m_init_quirk,
.plat_start = xhci_rzv2m_start,
};
static const struct xhci_plat_priv xhci_plat_brcm = {
.quirks = XHCI_RESET_ON_RESUME | XHCI_SUSPEND_RESUME_CLKS,
};
@ -162,6 +170,9 @@ static const struct of_device_id usb_xhci_of_match[] = {
}, {
.compatible = "renesas,rcar-gen3-xhci",
.data = &xhci_plat_renesas_rcar_gen3,
}, {
.compatible = "renesas,rzv2m-xhci",
.data = &xhci_plat_renesas_rzv2m,
}, {
.compatible = "brcm,xhci-brcm-v2",
.data = &xhci_plat_brcm,

38
drivers/usb/host/xhci-rzv2m.c Normal file
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@ -0,0 +1,38 @@
// SPDX-License-Identifier: GPL-2.0
/*
* xHCI host controller driver for RZ/V2M
*
* Copyright (C) 2022 Renesas Electronics Corporation
*/
#include <linux/usb/rzv2m_usb3drd.h>
#include "xhci-plat.h"
#include "xhci-rzv2m.h"
#define RZV2M_USB3_INTEN 0x1044 /* Interrupt Enable */
#define RZV2M_USB3_INT_XHC_ENA BIT(0)
#define RZV2M_USB3_INT_HSE_ENA BIT(2)
#define RZV2M_USB3_INT_ENA_VAL (RZV2M_USB3_INT_XHC_ENA \
| RZV2M_USB3_INT_HSE_ENA)
int xhci_rzv2m_init_quirk(struct usb_hcd *hcd)
{
struct device *dev = hcd->self.controller;
rzv2m_usb3drd_reset(dev->parent, true);
return 0;
}
void xhci_rzv2m_start(struct usb_hcd *hcd)
{
u32 int_en;
if (hcd->regs) {
/* Interrupt Enable */
int_en = readl(hcd->regs + RZV2M_USB3_INTEN);
int_en |= RZV2M_USB3_INT_ENA_VAL;
writel(int_en, hcd->regs + RZV2M_USB3_INTEN);
}
}

16
drivers/usb/host/xhci-rzv2m.h Normal file
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@ -0,0 +1,16 @@
/* SPDX-License-Identifier: GPL-2.0 */
#ifndef __XHCI_RZV2M_H
#define __XHCI_RZV2M_H
#if IS_ENABLED(CONFIG_USB_XHCI_RZV2M)
void xhci_rzv2m_start(struct usb_hcd *hcd);
int xhci_rzv2m_init_quirk(struct usb_hcd *hcd);
#else
static inline void xhci_rzv2m_start(struct usb_hcd *hcd) {}
static inline int xhci_rzv2m_init_quirk(struct usb_hcd *hcd)
{
return -EINVAL;
}
#endif
#endif /* __XHCI_RZV2M_H */