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First set of Ux500 DTS changes for the v5.6 kernel:

Browse Source 
- Add the GPADC IIO channels
 - Factor out generic pin configuration
 - Add the gpio_in_nopull configuration
 - Tighten up I2C and SPI buses
 - Clean up some compatibles
 - Extract a generic DB8500 DTSI
 - Add HREF520 DTS and the associated DB8520 DTSI
 - Split TVK R2 and R3 to separate DTSI files
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Merge tag 'ux500-armsoc-v5.6-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson into arm/dt

First set of Ux500 DTS changes for the v5.6 kernel:

- Add the GPADC IIO channels
- Factor out generic pin configuration
- Add the gpio_in_nopull configuration
- Tighten up I2C and SPI buses
- Clean up some compatibles
- Extract a generic DB8500 DTSI
- Add HREF520 DTS and the associated DB8520 DTSI
- Split TVK R2 and R3 to separate DTSI files

* tag 'ux500-armsoc-v5.6-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson:
  ARM: dts: ux500: Add devicetree for HREF520
  ARM: dts: ux500: Split TVK DTSI files in two
  ARM: dts: ux500: Break out DB8500 DTSI
  ARM: dts: ux500: Drop pulls on I2C buses
  ARM: dts: ux500: Use "arm,pl031" compatible for PL031
  ARM: dts: ux500: Add "simple-bus" compatible to soc node
  ARM: dts: ux500: Remove ux500_ prefix from ux500_serial* labels
  ARM: dts: ux500: Move serial aliases to ste-dbx5x0.dtsi
  ARM: dts: ux500: Add aliases for I2C and SPI buses
  ARM: dts: ux500: Disable I2C/SPI buses by default
  ARM: dts: ux500: nomadik-pinctrl: Add &gpio_in_nopull
  ARM: dts: ux500: Add pin configs for UART1 CTS/RTS pins
  ARM: dts: ux500: Add alternative SDI pin configs
  ARM: dts: ux500: Rename generic pin configs according to pin group
  ARM: dts: ux500: Move generic pin configs out of ste-href-family-pinctrl.dtsi
  dt-bindings: arm: Document compatibles for Ux500 boards
  ARM: dts: ux500: snowball: Remove unused PRCMU cpufreq node
  ARM: dts: ux500: declare GPADC IIO ADC channels

Link: https://lore.kernel.org/r/CACRpkdYfqJ=VXkP3Qm5Lw63AuR=1ChxbUW+Y-nhw5gCX6sYfDw@mail.gmail.com
Signed-off-by: Olof Johansson <olof@lixom.net>
This commit is contained in:
Olof Johansson 2019-12-17 10:03:56 -08:00
commit c3d68019fc
22 changed files with 1096 additions and 725 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

31
Documentation/devicetree/bindings/arm/ux500.yaml Normal file
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@ -0,0 +1,31 @@
# SPDX-License-Identifier: GPL-2.0-only
%YAML 1.2
---
$id: http://devicetree.org/schemas/arm/ux500.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Ux500 platforms device tree bindings
maintainers:
- Linus Walleij <linus.walleij@linaro.org>
properties:
$nodename:
const: '/'
compatible:
oneOf:
- description: ST-Ericsson HREF (pre-v60)
items:
- const: st-ericsson,mop500
- const: st-ericsson,u8500
- description: ST-Ericsson HREF (v60+)
items:
- const: st-ericsson,hrefv60+
- const: st-ericsson,u8500
- description: Calao Systems Snowball
items:
- const: calaosystems,snowball-a9500
- const: st-ericsson,u9500

1
MAINTAINERS
View File

@ -2058,6 +2058,7 @@ F: drivers/rtc/rtc-pl031.c
F: drivers/watchdog/coh901327_wdt.c
F: Documentation/devicetree/bindings/arm/ste-*
F: Documentation/devicetree/bindings/arm/ux500/
F: Documentation/devicetree/bindings/arm/ux500.yaml
T: git git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-nomadik.git
ARM/NUVOTON NPCM ARCHITECTURE

3
arch/arm/boot/dts/Makefile
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@ -1182,7 +1182,8 @@ dtb-$(CONFIG_ARCH_U8500) += \
ste-hrefprev60-stuib.dtb \
ste-hrefprev60-tvk.dtb \
ste-hrefv60plus-stuib.dtb \
ste-hrefv60plus-tvk.dtb
ste-hrefv60plus-tvk.dtb \
ste-href520-tvk.dtb
dtb-$(CONFIG_ARCH_UNIPHIER) += \
uniphier-ld4-ref.dtb \
uniphier-ld6b-ref.dtb \

102
arch/arm/boot/dts/ste-ab8500.dtsi
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@ -6,6 +6,20 @@
#include <dt-bindings/clock/ste-ab8500.h>
/ {
/* Essential housekeeping hardware monitors */
iio-hwmon {
compatible = "iio-hwmon";
io-channels = <&gpadc 0x02>, /* Battery temperature */
<&gpadc 0x03>, /* Main charger voltage */
<&gpadc 0x08>, /* Main battery voltage */
<&gpadc 0x09>, /* VBUS */
<&gpadc 0x0a>, /* Main charger current */
<&gpadc 0x0b>, /* USB charger current */
<&gpadc 0x0c>, /* Backup battery voltage */
<&gpadc 0x0d>, /* Die temperature */
<&gpadc 0x12>; /* Crystal temperature */
};
soc {
prcmu@80157000 {
ab8500 {
@ -33,12 +47,84 @@
interrupt-names = "60S", "ALARM";
};
ab8500-gpadc {
gpadc: ab8500-gpadc {
compatible = "stericsson,ab8500-gpadc";
interrupts = <32 IRQ_TYPE_LEVEL_HIGH
39 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "HW_CONV_END", "SW_CONV_END";
vddadc-supply = <&ab8500_ldo_tvout_reg>;
#address-cells = <1>;
#size-cells = <0>;
#io-channel-cells = <1>;
/* GPADC channels */
bat_ctrl: channel@01 {
reg = <0x01>;
};
btemp_ball: channel@02 {
reg = <0x02>;
};
main_charger_v: channel@03 {
reg = <0x03>;
};
acc_detect1: channel@04 {
reg = <0x04>;
};
acc_detect2: channel@05 {
reg = <0x05>;
};
adc_aux1: channel@06 {
reg = <0x06>;
};
adc_aux2: channel@07 {
reg = <0x07>;
};
main_batt_v: channel@08 {
reg = <0x08>;
};
vbus_v: channel@09 {
reg = <0x09>;
};
main_charger_c: channel@0a {
reg = <0x0a>;
};
usb_charger_c: channel@0b {
reg = <0x0b>;
};
bk_bat_v: channel@0c {
reg = <0x0c>;
};
die_temp: channel@0d {
reg = <0x0d>;
};
usb_id: channel@0e {
reg = <0x0e>;
};
xtal_temp: channel@12 {
reg = <0x12>;
};
vbat_true_meas: channel@13 {
reg = <0x13>;
};
bat_ctrl_and_ibat: channel@1c {
reg = <0x1c>;
};
vbat_meas_and_ibat: channel@1d {
reg = <0x1d>;
};
vbat_true_meas_and_ibat: channel@1e {
reg = <0x1e>;
};
bat_temp_and_ibat: channel@1f {
reg = <0x1f>;
};
};
ab8500_temp {
compatible = "stericsson,abx500-temp";
io-channels = <&gpadc 0x06>,
<&gpadc 0x07>;
io-channel-name = "aux1", "aux2";
};
ab8500_battery: ab8500_battery {
@ -49,17 +135,31 @@
ab8500_fg {
compatible = "stericsson,ab8500-fg";
battery = <&ab8500_battery>;
io-channels = <&gpadc 0x08>;
io-channel-name = "main_bat_v";
};
ab8500_btemp {
compatible = "stericsson,ab8500-btemp";
battery = <&ab8500_battery>;
io-channels = <&gpadc 0x02>,
<&gpadc 0x01>;
io-channel-name = "btemp_ball",
"bat_ctrl";
};
ab8500_charger {
compatible = "stericsson,ab8500-charger";
battery = <&ab8500_battery>;
vddadc-supply = <&ab8500_ldo_tvout_reg>;
io-channels = <&gpadc 0x03>,
<&gpadc 0x0a>,
<&gpadc 0x09>,
<&gpadc 0x0b>;
io-channel-name = "main_charger_v",
"main_charger_c",
"vbus_v",
"usb_charger_c";
};
ab8500_chargalg {

15
arch/arm/boot/dts/ste-db8500.dtsi Normal file
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@ -0,0 +1,15 @@
// SPDX-License-Identifier: GPL-2.0-or-later
#include "ste-dbx5x0.dtsi"
/ {
cpus {
cpu@300 {
/* cpufreq controls */
operating-points = <998400 0
800000 0
400000 0
200000 0>;
};
};
};

15
arch/arm/boot/dts/ste-db8520.dtsi Normal file
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@ -0,0 +1,15 @@
// SPDX-License-Identifier: GPL-2.0-or-later
#include "ste-dbx5x0.dtsi"
/ {
cpus {
cpu@300 {
/* cpufreq controls */
operating-points = <1152000 0
800000 0
400000 0
200000 0>;
};
};
};

632
arch/arm/boot/dts/ste-dbx5x0-pinctrl.dtsi Normal file
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@ -0,0 +1,632 @@
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* Copyright 2013 Linaro Ltd.
*/
#include "ste-nomadik-pinctrl.dtsi"
&pinctrl {
/* Settings for all UART default and sleep states */
uart0 {
u0_a_1_default: u0_a_1_default {
default_mux {
function = "u0";
groups = "u0_a_1";
};
default_cfg1 {
pins = "GPIO0_AJ5", "GPIO2_AH4"; /* CTS+RXD */
ste,config = <&in_pu>;
};
default_cfg2 {
pins = "GPIO1_AJ3", "GPIO3_AH3"; /* RTS+TXD */
ste,config = <&out_hi>;
};
};
u0_a_1_sleep: u0_a_1_sleep {
sleep_cfg1 {
pins = "GPIO0_AJ5", "GPIO2_AH4"; /* CTS+RXD */
ste,config = <&slpm_in_wkup_pdis>;
};
sleep_cfg2 {
pins = "GPIO1_AJ3"; /* RTS */
ste,config = <&slpm_out_hi_wkup_pdis>;
};
sleep_cfg3 {
pins = "GPIO3_AH3"; /* TXD */
ste,config = <&slpm_out_wkup_pdis>;
};
};
};
uart1 {
u1rxtx_a_1_default: u1rxtx_a_1_default {
default_mux {
function = "u1";
groups = "u1rxtx_a_1";
};
default_cfg1 {
pins = "GPIO4_AH6"; /* RXD */
ste,config = <&in_pu>;
};
default_cfg2 {
pins = "GPIO5_AG6"; /* TXD */
ste,config = <&out_hi>;
};
};
u1rxtx_a_1_sleep: u1rxtx_a_1_sleep {
sleep_cfg1 {
pins = "GPIO4_AH6"; /* RXD */
ste,config = <&slpm_in_wkup_pdis>;
};
sleep_cfg2 {
pins = "GPIO5_AG6"; /* TXD */
ste,config = <&slpm_out_wkup_pdis>;
};
};
u1ctsrts_a_1_default: u1ctsrts_a_1_default {
default_mux {
function = "u1";
groups = "u1ctsrts_a_1";
};
default_cfg1 {
pins = "GPIO6_AF6"; /* CTS */
ste,config = <&in_pu>;
};
default_cfg2 {
pins = "GPIO7_AG5"; /* RTS */
ste,config = <&out_hi>;
};
};
u1ctsrts_a_1_sleep: u1ctsrts_a_1_sleep {
sleep_cfg1 {
pins = "GPIO6_AF6"; /* CTS */
ste,config = <&slpm_in_wkup_pdis>;
};
sleep_cfg2 {
pins = "GPIO7_AG5"; /* RTS */
ste,config = <&slpm_out_hi_wkup_pdis>;
};
};
};
uart2 {
u2rxtx_c_1_default: u2rxtx_c_1_default {
default_mux {
function = "u2";
groups = "u2rxtx_c_1";
};
default_cfg1 {
pins = "GPIO29_W2"; /* RXD */
ste,config = <&in_pu>;
};
default_cfg2 {
pins = "GPIO30_W3"; /* TXD */
ste,config = <&out_hi>;
};
};
u2rxtx_c_1_sleep: u2rxtx_c_1_sleep {
sleep_cfg1 {
pins = "GPIO29_W2"; /* RXD */
ste,config = <&in_wkup_pdis>;
};
sleep_cfg2 {
pins = "GPIO30_W3"; /* TXD */
ste,config = <&out_wkup_pdis>;
};
};
};
/* Settings for all I2C default and sleep states */
i2c0 {
i2c0_a_1_default: i2c0_a_1_default {
default_mux {
function = "i2c0";
groups = "i2c0_a_1";
};
default_cfg1 {
pins = "GPIO147_C15", "GPIO148_B16"; /* SDA/SCL */
ste,config = <&in_nopull>;
};
};
i2c0_a_1_sleep: i2c0_a_1_sleep {
sleep_cfg1 {
pins = "GPIO147_C15", "GPIO148_B16"; /* SDA/SCL */
ste,config = <&slpm_in_wkup_pdis>;
};
};
};
i2c1 {
i2c1_b_2_default: i2c1_b_2_default {
default_mux {
function = "i2c1";
groups = "i2c1_b_2";
};
default_cfg1 {
pins = "GPIO16_AD3", "GPIO17_AD4"; /* SDA/SCL */
ste,config = <&in_nopull>;
};
};
i2c1_b_2_sleep: i2c1_b_2_sleep {
sleep_cfg1 {
pins = "GPIO16_AD3", "GPIO17_AD4"; /* SDA/SCL */
ste,config = <&slpm_in_wkup_pdis>;
};
};
};
i2c2 {
i2c2_b_2_default: i2c2_b_2_default {
default_mux {
function = "i2c2";
groups = "i2c2_b_2";
};
default_cfg1 {
pins = "GPIO10_AF5", "GPIO11_AG4"; /* SDA/SCL */
ste,config = <&in_nopull>;
};
};
i2c2_b_2_sleep: i2c2_b_2_sleep {
sleep_cfg1 {
pins = "GPIO10_AF5", "GPIO11_AG4"; /* SDA/SCL */
ste,config = <&slpm_in_wkup_pdis>;
};
};
};
i2c3 {
i2c3_c_2_default: i2c3_c_2_default {
default_mux {
function = "i2c3";
groups = "i2c3_c_2";
};
default_cfg1 {
pins = "GPIO229_AG7", "GPIO230_AF7"; /* SDA/SCL */
ste,config = <&in_nopull>;
};
};
i2c3_c_2_sleep: i2c3_c_2_sleep {
sleep_cfg1 {
pins = "GPIO229_AG7", "GPIO230_AF7"; /* SDA/SCL */
ste,config = <&slpm_in_wkup_pdis>;
};
};
};
/*
* Activating I2C4 will conflict with UART1 about the same pins so do not
* enable I2C4 and UART1 at the same time.
*/
i2c4 {
i2c4_b_1_default: i2c4_b_1_default {
default_mux {
function = "i2c4";
groups = "i2c4_b_1";
};
default_cfg1 {
pins = "GPIO4_AH6", "GPIO5_AG6"; /* SDA/SCL */
ste,config = <&in_nopull>;
};
};
i2c4_b_1_sleep: i2c4_b_1_sleep {
sleep_cfg1 {
pins = "GPIO4_AH6", "GPIO5_AG6"; /* SDA/SCL */
ste,config = <&slpm_in_wkup_pdis>;
};
};
};
/* Settings for all MMC/SD/SDIO default and sleep states */
sdi0 {
/* This is the external SD card slot, 4 bits wide */
mc0_a_1_default: mc0_a_1_default {
default_mux {
function = "mc0";
groups = "mc0_a_1";
};
default_cfg1 {
pins =
"GPIO18_AC2", /* CMDDIR */
"GPIO19_AC1", /* DAT0DIR */
"GPIO20_AB4"; /* DAT2DIR */
ste,config = <&out_hi>;
};
default_cfg2 {
pins = "GPIO22_AA3"; /* FBCLK */
ste,config = <&in_nopull>;
};
default_cfg3 {
pins = "GPIO23_AA4"; /* CLK */
ste,config = <&out_lo>;
};
default_cfg4 {
pins =
"GPIO24_AB2", /* CMD */
"GPIO25_Y4", /* DAT0 */
"GPIO26_Y2", /* DAT1 */
"GPIO27_AA2", /* DAT2 */
"GPIO28_AA1"; /* DAT3 */
ste,config = <&in_pu>;
};
};
mc0_a_1_sleep: mc0_a_1_sleep {
sleep_cfg1 {
pins =
"GPIO18_AC2", /* CMDDIR */
"GPIO19_AC1", /* DAT0DIR */
"GPIO20_AB4"; /* DAT2DIR */
ste,config = <&slpm_out_hi_wkup_pdis>;
};
sleep_cfg2 {
pins =
"GPIO22_AA3", /* FBCLK */
"GPIO24_AB2", /* CMD */
"GPIO25_Y4", /* DAT0 */
"GPIO26_Y2", /* DAT1 */
"GPIO27_AA2", /* DAT2 */
"GPIO28_AA1"; /* DAT3 */
ste,config = <&slpm_in_wkup_pdis>;
};
sleep_cfg3 {
pins = "GPIO23_AA4"; /* CLK */
ste,config = <&slpm_out_lo_wkup_pdis>;
};
};
mc0_a_2_default: mc0_a_2_default {
default_mux {
function = "mc0";
groups = "mc0_a_2";
};
default_cfg1 {
pins = "GPIO22_AA3"; /* FBCLK */
ste,config = <&in_nopull>;
};
default_cfg2 {
pins = "GPIO23_AA4"; /* CLK */
ste,config = <&out_lo>;
};
default_cfg3 {
pins =
"GPIO24_AB2", /* CMD */
"GPIO25_Y4", /* DAT0 */
"GPIO26_Y2", /* DAT1 */
"GPIO27_AA2", /* DAT2 */
"GPIO28_AA1"; /* DAT3 */
ste,config = <&in_pu>;
};
};
mc0_a_2_sleep: mc0_a_2_sleep {
sleep_cfg1 {
pins =
"GPIO22_AA3", /* FBCLK */
"GPIO24_AB2", /* CMD */
"GPIO25_Y4", /* DAT0 */
"GPIO26_Y2", /* DAT1 */
"GPIO27_AA2", /* DAT2 */
"GPIO28_AA1"; /* DAT3 */
ste,config = <&slpm_in_wkup_pdis>;
};
sleep_cfg2 {
pins = "GPIO23_AA4"; /* CLK */
ste,config = <&slpm_out_lo_wkup_pdis>;
};
};
};
sdi1 {
/* This is the WLAN SDIO 4 bits wide */
mc1_a_1_default: mc1_a_1_default {
default_mux {
function = "mc1";
groups = "mc1_a_1";
};
default_cfg1 {
pins = "GPIO208_AH16"; /* CLK */
ste,config = <&out_lo>;
};
default_cfg2 {
pins = "GPIO209_AG15"; /* FBCLK */
ste,config = <&in_nopull>;
};
default_cfg3 {
pins =
"GPIO210_AJ15", /* CMD */
"GPIO211_AG14", /* DAT0 */
"GPIO212_AF13", /* DAT1 */
"GPIO213_AG13", /* DAT2 */
"GPIO214_AH15"; /* DAT3 */
ste,config = <&in_pu>;
};
};
mc1_a_1_sleep: mc1_a_1_sleep {
sleep_cfg1 {
pins = "GPIO208_AH16"; /* CLK */
ste,config = <&slpm_out_lo_wkup_pdis>;
};
sleep_cfg2 {
pins =
"GPIO209_AG15", /* FBCLK */
"GPIO210_AJ15", /* CMD */
"GPIO211_AG14", /* DAT0 */
"GPIO212_AF13", /* DAT1 */
"GPIO213_AG13", /* DAT2 */
"GPIO214_AH15"; /* DAT3 */
ste,config = <&slpm_in_wkup_pdis>;
};
};
mc1_a_2_default: mc1_a_2_default {
default_mux {
function = "mc1";
groups = "mc1_a_2";
};
default_cfg1 {
pins = "GPIO208_AH16"; /* CLK */
ste,config = <&out_lo>;
};
default_cfg2 {
pins =
"GPIO210_AJ15", /* CMD */
"GPIO211_AG14", /* DAT0 */
"GPIO212_AF13", /* DAT1 */
"GPIO213_AG13", /* DAT2 */
"GPIO214_AH15"; /* DAT3 */
ste,config = <&in_pu>;
};
};
mc1_a_2_sleep: mc1_a_2_sleep {
sleep_cfg1 {
pins = "GPIO208_AH16"; /* CLK */
ste,config = <&slpm_out_lo_wkup_pdis>;
};
sleep_cfg2 {
pins =
"GPIO210_AJ15", /* CMD */
"GPIO211_AG14", /* DAT0 */
"GPIO212_AF13", /* DAT1 */
"GPIO213_AG13", /* DAT2 */
"GPIO214_AH15"; /* DAT3 */
ste,config = <&slpm_in_wkup_pdis>;
};
};
};
sdi2 {
/* This is the eMMC 8 bits wide, usually PoP eMMC */
mc2_a_1_default: mc2_a_1_default {
default_mux {
function = "mc2";
groups = "mc2_a_1";
};
default_cfg1 {
pins = "GPIO128_A5"; /* CLK */
ste,config = <&out_lo>;
};
default_cfg2 {
pins = "GPIO130_C8"; /* FBCLK */
ste,config = <&in_nopull>;
};
default_cfg3 {
pins =
"GPIO129_B4", /* CMD */
"GPIO131_A12", /* DAT0 */
"GPIO132_C10", /* DAT1 */
"GPIO133_B10", /* DAT2 */
"GPIO134_B9", /* DAT3 */
"GPIO135_A9", /* DAT4 */
"GPIO136_C7", /* DAT5 */
"GPIO137_A7", /* DAT6 */
"GPIO138_C5"; /* DAT7 */
ste,config = <&in_pu>;
};
};
mc2_a_1_sleep: mc2_a_1_sleep {
sleep_cfg1 {
pins = "GPIO128_A5"; /* CLK */
ste,config = <&out_lo_wkup_pdis>;
};
sleep_cfg2 {
pins =
"GPIO130_C8", /* FBCLK */
"GPIO129_B4"; /* CMD */
ste,config = <&in_wkup_pdis_en>;
};
sleep_cfg3 {
pins =
"GPIO131_A12", /* DAT0 */
"GPIO132_C10", /* DAT1 */
"GPIO133_B10", /* DAT2 */
"GPIO134_B9", /* DAT3 */
"GPIO135_A9", /* DAT4 */
"GPIO136_C7", /* DAT5 */
"GPIO137_A7", /* DAT6 */
"GPIO138_C5"; /* DAT7 */
ste,config = <&in_wkup_pdis>;
};
};
};
sdi4 {
/* This is the eMMC 8 bits wide, usually PCB-mounted eMMC */
mc4_a_1_default: mc4_a_1_default {
default_mux {
function = "mc4";
groups = "mc4_a_1";
};
default_cfg1 {
pins = "GPIO203_AE23"; /* CLK */
ste,config = <&out_lo>;
};
default_cfg2 {
pins = "GPIO202_AF25"; /* FBCLK */
ste,config = <&in_nopull>;
};
default_cfg3 {
pins =
"GPIO201_AF24", /* CMD */
"GPIO200_AH26", /* DAT0 */
"GPIO199_AH23", /* DAT1 */
"GPIO198_AG25", /* DAT2 */
"GPIO197_AH24", /* DAT3 */
"GPIO207_AJ23", /* DAT4 */
"GPIO206_AG24", /* DAT5 */
"GPIO205_AG23", /* DAT6 */
"GPIO204_AF23"; /* DAT7 */
ste,config = <&in_pu>;
};
};
mc4_a_1_sleep: mc4_a_1_sleep {
sleep_cfg1 {
pins = "GPIO203_AE23"; /* CLK */
ste,config = <&out_lo_wkup_pdis>;
};
sleep_cfg2 {
pins =
"GPIO202_AF25", /* FBCLK */
"GPIO201_AF24", /* CMD */
"GPIO200_AH26", /* DAT0 */
"GPIO199_AH23", /* DAT1 */
"GPIO198_AG25", /* DAT2 */
"GPIO197_AH24", /* DAT3 */
"GPIO207_AJ23", /* DAT4 */
"GPIO206_AG24", /* DAT5 */
"GPIO205_AG23", /* DAT6 */
"GPIO204_AF23"; /* DAT7 */
ste,config = <&slpm_in_wkup_pdis>;
};
};
};
/*
* Multi-rate serial ports (MSPs) - MSP3 output is internal and
* cannot be muxed onto any pins.
*/
msp0 {
msp0txrxtfstck_a_1_default: msp0txrxtfstck_a_1_default {
default_msp0_mux {
function = "msp0";
groups = "msp0txrx_a_1", "msp0tfstck_a_1";
};
default_msp0_cfg {
pins =
"GPIO12_AC4", /* TXD */
"GPIO15_AC3", /* RXD */
"GPIO13_AF3", /* TFS */
"GPIO14_AE3"; /* TCK */
ste,config = <&in_nopull>;
};
};
};
msp1 {
msp1txrx_a_1_default: msp1txrx_a_1_default {
default_mux {
function = "msp1";
groups = "msp1txrx_a_1", "msp1_a_1";
};
default_cfg1 {
pins = "GPIO33_AF2";
ste,config = <&out_lo>;
};
default_cfg2 {
pins =
"GPIO34_AE1",
"GPIO35_AE2",
"GPIO36_AG2";
ste,config = <&in_nopull>;
};
};
};
msp2 {
msp2_a_1_default: msp2_a_1_default {
/* MSP2 usually used for HDMI audio */
default_mux {
function = "msp2";
groups = "msp2_a_1";
};
default_cfg1 {
pins =
"GPIO193_AH27", /* TXD */
"GPIO194_AF27", /* TCK */
"GPIO195_AG28"; /* TFS */
ste,config = <&in_pd>;
};
default_cfg2 {
pins = "GPIO196_AG26"; /* RXD */
ste,config = <&out_lo>;
};
};
};
musb {
usb_a_1_default: usb_a_1_default {
default_mux {
function = "usb";
groups = "usb_a_1";
};
default_cfg1 {
pins =
"GPIO256_AF28", /* NXT */
"GPIO258_AD29", /* XCLK */
"GPIO259_AC29", /* DIR */
"GPIO260_AD28", /* DAT7 */
"GPIO261_AD26", /* DAT6 */
"GPIO262_AE26", /* DAT5 */
"GPIO263_AG29", /* DAT4 */
"GPIO264_AE27", /* DAT3 */
"GPIO265_AD27", /* DAT2 */
"GPIO266_AC28", /* DAT1 */
"GPIO267_AC27"; /* DAT0 */
ste,config = <&in_nopull>;
};
default_cfg2 {
pins = "GPIO257_AE29"; /* STP */
ste,config = <&out_hi>;
};
};
usb_a_1_sleep: usb_a_1_sleep {
sleep_cfg1 {
pins =
"GPIO256_AF28", /* NXT */
"GPIO258_AD29", /* XCLK */
"GPIO259_AC29"; /* DIR */
ste,config = <&slpm_wkup_pdis_en>;
};
sleep_cfg2 {
pins = "GPIO257_AE29"; /* STP */
ste,config = <&slpm_out_hi_wkup_pdis>;
};
sleep_cfg3 {
pins =
"GPIO260_AD28", /* DAT7 */
"GPIO261_AD26", /* DAT6 */
"GPIO262_AE26", /* DAT5 */
"GPIO263_AG29", /* DAT4 */
"GPIO264_AE27", /* DAT3 */
"GPIO265_AD27", /* DAT2 */
"GPIO266_AC28", /* DAT1 */
"GPIO267_AC27"; /* DAT0 */
ste,config = <&slpm_in_wkup_pdis_en>;
};
};
};
};

75
arch/arm/boot/dts/ste-dbx5x0.dtsi
View File

@ -14,6 +14,22 @@
#address-cells = <1>;
#size-cells = <1>;
/* This stablilizes the device enumeration */
aliases {
i2c0 = &i2c0;
i2c1 = &i2c1;
i2c2 = &i2c2;
i2c3 = &i2c3;
i2c4 = &i2c4;
spi0 = &spi0;
spi1 = &spi1;
spi2 = &spi2;
spi3 = &spi3;
serial0 = &serial0;
serial1 = &serial1;
serial2 = &serial2;
};
chosen {
};
@ -36,11 +52,6 @@
device_type = "cpu";
compatible = "arm,cortex-a9";
reg = <0x300>;
/* cpufreq controls */
operating-points = <998400 0
800000 0
400000 0
200000 0>;
clocks = <&prcmu_clk PRCMU_ARMSS>;
clock-names = "cpu";
clock-latency = <20000>;
@ -93,7 +104,7 @@
soc {
#address-cells = <1>;
#size-cells = <1>;
compatible = "stericsson,db8500";
compatible = "stericsson,db8500", "simple-bus";
interrupt-parent = <&intc>;
ranges;
@ -324,7 +335,7 @@
};
rtc@80154000 {
compatible = "arm,rtc-pl031", "arm,primecell";
compatible = "arm,pl031", "arm,primecell";
reg = <0x80154000 0x1000>;
interrupts = <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>;
@ -638,7 +649,7 @@
};
};
i2c@80004000 {
i2c0: i2c@80004000 {
compatible = "stericsson,db8500-i2c", "st,nomadik-i2c", "arm,primecell";
reg = <0x80004000 0x1000>;
interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
@ -651,9 +662,11 @@
clocks = <&prcc_kclk 3 3>, <&prcc_pclk 3 3>;
clock-names = "i2cclk", "apb_pclk";
power-domains = <&pm_domains DOMAIN_VAPE>;
status = "disabled";
};
i2c@80122000 {
i2c1: i2c@80122000 {
compatible = "stericsson,db8500-i2c", "st,nomadik-i2c", "arm,primecell";
reg = <0x80122000 0x1000>;
interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>;
@ -667,9 +680,11 @@
clocks = <&prcc_kclk 1 2>, <&prcc_pclk 1 2>;
clock-names = "i2cclk", "apb_pclk";
power-domains = <&pm_domains DOMAIN_VAPE>;
status = "disabled";
};
i2c@80128000 {
i2c2: i2c@80128000 {
compatible = "stericsson,db8500-i2c", "st,nomadik-i2c", "arm,primecell";
reg = <0x80128000 0x1000>;
interrupts = <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>;
@ -683,9 +698,11 @@
clocks = <&prcc_kclk 1 6>, <&prcc_pclk 1 6>;
clock-names = "i2cclk", "apb_pclk";
power-domains = <&pm_domains DOMAIN_VAPE>;
status = "disabled";
};
i2c@80110000 {
i2c3: i2c@80110000 {
compatible = "stericsson,db8500-i2c", "st,nomadik-i2c", "arm,primecell";
reg = <0x80110000 0x1000>;
interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;
@ -699,9 +716,11 @@
clocks = <&prcc_kclk 2 0>, <&prcc_pclk 2 0>;
clock-names = "i2cclk", "apb_pclk";
power-domains = <&pm_domains DOMAIN_VAPE>;
status = "disabled";
};
i2c@8012a000 {
i2c4: i2c@8012a000 {
compatible = "stericsson,db8500-i2c", "st,nomadik-i2c", "arm,primecell";
reg = <0x8012a000 0x1000>;
interrupts = <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>;
@ -715,9 +734,11 @@
clocks = <&prcc_kclk 1 9>, <&prcc_pclk 1 10>;
clock-names = "i2cclk", "apb_pclk";
power-domains = <&pm_domains DOMAIN_VAPE>;
status = "disabled";
};
spi@80002000 {
ssp0: spi@80002000 {
compatible = "arm,pl022", "arm,primecell";
reg = <0x80002000 0x1000>;
interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
@ -729,9 +750,11 @@
<&dma 8 0 0x0>; /* Logical - MemToDev */
dma-names = "rx", "tx";
power-domains = <&pm_domains DOMAIN_VAPE>;
status = "disabled";
};
spi@80003000 {
ssp1: spi@80003000 {
compatible = "arm,pl022", "arm,primecell";
reg = <0x80003000 0x1000>;
interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>;
@ -743,9 +766,11 @@
<&dma 9 0 0x0>; /* Logical - MemToDev */
dma-names = "rx", "tx";
power-domains = <&pm_domains DOMAIN_VAPE>;
status = "disabled";
};
spi@8011a000 {
spi0: spi@8011a000 {
compatible = "arm,pl022", "arm,primecell";
reg = <0x8011a000 0x1000>;
interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
@ -758,9 +783,11 @@
<&dma 0 0 0x0>; /* Logical - MemToDev */
dma-names = "rx", "tx";
power-domains = <&pm_domains DOMAIN_VAPE>;
status = "disabled";
};
spi@80112000 {
spi1: spi@80112000 {
compatible = "arm,pl022", "arm,primecell";
reg = <0x80112000 0x1000>;
interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>;
@ -773,9 +800,11 @@
<&dma 35 0 0x0>; /* Logical - MemToDev */
dma-names = "rx", "tx";
power-domains = <&pm_domains DOMAIN_VAPE>;
status = "disabled";
};
spi@80111000 {
spi2: spi@80111000 {
compatible = "arm,pl022", "arm,primecell";
reg = <0x80111000 0x1000>;
interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
@ -788,9 +817,11 @@
<&dma 33 0 0x0>; /* Logical - MemToDev */
dma-names = "rx", "tx";
power-domains = <&pm_domains DOMAIN_VAPE>;
status = "disabled";
};
spi@80129000 {
spi3: spi@80129000 {
compatible = "arm,pl022", "arm,primecell";
reg = <0x80129000 0x1000>;
interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>;
@ -803,9 +834,11 @@
<&dma 40 0 0x0>; /* Logical - MemToDev */
dma-names = "rx", "tx";
power-domains = <&pm_domains DOMAIN_VAPE>;
status = "disabled";
};
ux500_serial0: uart@80120000 {
serial0: uart@80120000 {
compatible = "arm,pl011", "arm,primecell";
reg = <0x80120000 0x1000>;
interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
@ -820,7 +853,7 @@
status = "disabled";
};
ux500_serial1: uart@80121000 {
serial1: uart@80121000 {
compatible = "arm,pl011", "arm,primecell";
reg = <0x80121000 0x1000>;
interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
@ -835,7 +868,7 @@
status = "disabled";
};
ux500_serial2: uart@80007000 {
serial2: uart@80007000 {
compatible = "arm,pl011", "arm,primecell";
reg = <0x80007000 0x1000>;
interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;

532
arch/arm/boot/dts/ste-href-family-pinctrl.dtsi
View File

@ -3,212 +3,11 @@
* Copyright 2013 Linaro Ltd.
*/
#include "ste-nomadik-pinctrl.dtsi"
#include "ste-dbx5x0-pinctrl.dtsi"
/ {
soc {
pinctrl {
/* Settings for all UART default and sleep states */
uart0 {
uart0_default_mode: uart0_default {
default_mux {
function = "u0";
groups = "u0_a_1";
};
default_cfg1 {
pins = "GPIO0_AJ5", "GPIO2_AH4"; /* CTS+RXD */
ste,config = <&in_pu>;
};
default_cfg2 {
pins = "GPIO1_AJ3", "GPIO3_AH3"; /* RTS+TXD */
ste,config = <&out_hi>;
};
};
uart0_sleep_mode: uart0_sleep {
sleep_cfg1 {
pins = "GPIO0_AJ5", "GPIO2_AH4"; /* CTS+RXD */
ste,config = <&slpm_in_wkup_pdis>;
};
sleep_cfg2 {
pins = "GPIO1_AJ3"; /* RTS */
ste,config = <&slpm_out_hi_wkup_pdis>;
};
sleep_cfg3 {
pins = "GPIO3_AH3"; /* TXD */
ste,config = <&slpm_out_wkup_pdis>;
};
};
};
uart1 {
uart1_default_mode: uart1_default {
default_mux {
function = "u1";
groups = "u1rxtx_a_1";
};
default_cfg1 {
pins = "GPIO4_AH6"; /* RXD */
ste,config = <&in_pu>;
};
default_cfg2 {
pins = "GPIO5_AG6"; /* TXD */
ste,config = <&out_hi>;
};
};
uart1_sleep_mode: uart1_sleep {
sleep_cfg1 {
pins = "GPIO4_AH6"; /* RXD */
ste,config = <&slpm_in_wkup_pdis>;
};
sleep_cfg2 {
pins = "GPIO5_AG6"; /* TXD */
ste,config = <&slpm_out_wkup_pdis>;
};
};
};
uart2 {
uart2_default_mode: uart2_default {
default_mux {
function = "u2";
groups = "u2rxtx_c_1";
};
default_cfg1 {
pins = "GPIO29_W2"; /* RXD */
ste,config = <&in_pu>;
};
default_cfg2 {
pins = "GPIO30_W3"; /* TXD */
ste,config = <&out_hi>;
};
};
uart2_sleep_mode: uart2_sleep {
sleep_cfg1 {
pins = "GPIO29_W2"; /* RXD */
ste,config = <&in_wkup_pdis>;
};
sleep_cfg2 {
pins = "GPIO30_W3"; /* TXD */
ste,config = <&out_wkup_pdis>;
};
};
};
/* Settings for all I2C default and sleep states */
i2c0 {
i2c0_default_mode: i2c_default {
default_mux {
function = "i2c0";
groups = "i2c0_a_1";
};
default_cfg1 {
pins = "GPIO147_C15", "GPIO148_B16"; /* SDA/SCL */
ste,config = <&in_pu>;
};
};
i2c0_sleep_mode: i2c_sleep {
sleep_cfg1 {
pins = "GPIO147_C15", "GPIO148_B16"; /* SDA/SCL */
ste,config = <&slpm_in_wkup_pdis>;
};
};
};
i2c1 {
i2c1_default_mode: i2c_default {
default_mux {
function = "i2c1";
groups = "i2c1_b_2";
};
default_cfg1 {
pins = "GPIO16_AD3", "GPIO17_AD4"; /* SDA/SCL */
ste,config = <&in_pu>;
};
};
i2c1_sleep_mode: i2c_sleep {
sleep_cfg1 {
pins = "GPIO16_AD3", "GPIO17_AD4"; /* SDA/SCL */
ste,config = <&slpm_in_wkup_pdis>;
};
};
};
i2c2 {
i2c2_default_mode: i2c_default {
default_mux {
function = "i2c2";
groups = "i2c2_b_2";
};
default_cfg1 {
pins = "GPIO10_AF5", "GPIO11_AG4"; /* SDA/SCL */
ste,config = <&in_pu>;
};
};
i2c2_sleep_mode: i2c_sleep {
sleep_cfg1 {
pins = "GPIO10_AF5", "GPIO11_AG4"; /* SDA/SCL */
ste,config = <&slpm_in_wkup_pdis>;
};
};
};
i2c3 {
i2c3_default_mode: i2c_default {
default_mux {
function = "i2c3";
groups = "i2c3_c_2";
};
default_cfg1 {
pins = "GPIO229_AG7", "GPIO230_AF7"; /* SDA/SCL */
ste,config = <&in_pu>;
};
};
i2c3_sleep_mode: i2c_sleep {
sleep_cfg1 {
pins = "GPIO229_AG7", "GPIO230_AF7"; /* SDA/SCL */
ste,config = <&slpm_in_wkup_pdis>;
};
};
};
/*
* Activating I2C4 will conflict with UART1 about the same pins so do not
* enable I2C4 and UART1 at the same time.
*/
i2c4 {
i2c4_default_mode: i2c_default {
default_mux {
function = "i2c4";
groups = "i2c4_b_1";
};
default_cfg1 {
pins = "GPIO4_AH6", "GPIO5_AG6"; /* SDA/SCL */
ste,config = <&in_pu>;
};
};
i2c4_sleep_mode: i2c_sleep {
sleep_cfg1 {
pins = "GPIO4_AH6", "GPIO5_AG6"; /* SDA/SCL */
ste,config = <&slpm_in_wkup_pdis>;
};
};
};
/* Settings for all SPI default and sleep states */
spi2 {
spi2_default_mode: spi_default {
@ -270,335 +69,6 @@
};
};
/* Settings for all MMC/SD/SDIO default and sleep states */
sdi0 {
/* This is the external SD card slot, 4 bits wide */
sdi0_default_mode: sdi0_default {
default_mux {
function = "mc0";
groups = "mc0_a_1";
};
default_cfg1 {
pins =
"GPIO18_AC2", /* CMDDIR */
"GPIO19_AC1", /* DAT0DIR */
"GPIO20_AB4"; /* DAT2DIR */
ste,config = <&out_hi>;
};
default_cfg2 {
pins = "GPIO22_AA3"; /* FBCLK */
ste,config = <&in_nopull>;
};
default_cfg3 {
pins = "GPIO23_AA4"; /* CLK */
ste,config = <&out_lo>;
};
default_cfg4 {
pins =
"GPIO24_AB2", /* CMD */
"GPIO25_Y4", /* DAT0 */
"GPIO26_Y2", /* DAT1 */
"GPIO27_AA2", /* DAT2 */
"GPIO28_AA1"; /* DAT3 */
ste,config = <&in_pu>;
};
};
sdi0_sleep_mode: sdi0_sleep {
sleep_cfg1 {
pins =
"GPIO18_AC2", /* CMDDIR */
"GPIO19_AC1", /* DAT0DIR */
"GPIO20_AB4"; /* DAT2DIR */
ste,config = <&slpm_out_hi_wkup_pdis>;
};
sleep_cfg2 {
pins =
"GPIO22_AA3", /* FBCLK */
"GPIO24_AB2", /* CMD */
"GPIO25_Y4", /* DAT0 */
"GPIO26_Y2", /* DAT1 */
"GPIO27_AA2", /* DAT2 */
"GPIO28_AA1"; /* DAT3 */
ste,config = <&slpm_in_wkup_pdis>;
};
sleep_cfg3 {
pins = "GPIO23_AA4"; /* CLK */
ste,config = <&slpm_out_lo_wkup_pdis>;
};
};
};
sdi1 {
/* This is the WLAN SDIO 4 bits wide */
sdi1_default_mode: sdi1_default {
default_mux {
function = "mc1";
groups = "mc1_a_1";
};
default_cfg1 {
pins = "GPIO208_AH16"; /* CLK */
ste,config = <&out_lo>;
};
default_cfg2 {
pins = "GPIO209_AG15"; /* FBCLK */
ste,config = <&in_nopull>;
};
default_cfg3 {
pins =
"GPIO210_AJ15", /* CMD */
"GPIO211_AG14", /* DAT0 */
"GPIO212_AF13", /* DAT1 */
"GPIO213_AG13", /* DAT2 */
"GPIO214_AH15"; /* DAT3 */
ste,config = <&in_pu>;
};
};
sdi1_sleep_mode: sdi1_sleep {
sleep_cfg1 {
pins = "GPIO208_AH16"; /* CLK */
ste,config = <&slpm_out_lo_wkup_pdis>;
};
sleep_cfg2 {
pins =
"GPIO209_AG15", /* FBCLK */
"GPIO210_AJ15", /* CMD */
"GPIO211_AG14", /* DAT0 */
"GPIO212_AF13", /* DAT1 */
"GPIO213_AG13", /* DAT2 */
"GPIO214_AH15"; /* DAT3 */
ste,config = <&slpm_in_wkup_pdis>;
};
};
};
sdi2 {
/* This is the eMMC 8 bits wide, usually PoP eMMC */
sdi2_default_mode: sdi2_default {
default_mux {
function = "mc2";
groups = "mc2_a_1";
};
default_cfg1 {
pins = "GPIO128_A5"; /* CLK */
ste,config = <&out_lo>;
};
default_cfg2 {
pins = "GPIO130_C8"; /* FBCLK */
ste,config = <&in_nopull>;
};
default_cfg3 {
pins =
"GPIO129_B4", /* CMD */
"GPIO131_A12", /* DAT0 */
"GPIO132_C10", /* DAT1 */
"GPIO133_B10", /* DAT2 */
"GPIO134_B9", /* DAT3 */
"GPIO135_A9", /* DAT4 */
"GPIO136_C7", /* DAT5 */
"GPIO137_A7", /* DAT6 */
"GPIO138_C5"; /* DAT7 */
ste,config = <&in_pu>;
};
};
sdi2_sleep_mode: sdi2_sleep {
sleep_cfg1 {
pins = "GPIO128_A5"; /* CLK */
ste,config = <&out_lo_wkup_pdis>;
};
sleep_cfg2 {
pins =
"GPIO130_C8", /* FBCLK */
"GPIO129_B4"; /* CMD */
ste,config = <&in_wkup_pdis_en>;
};
sleep_cfg3 {
pins =
"GPIO131_A12", /* DAT0 */
"GPIO132_C10", /* DAT1 */
"GPIO133_B10", /* DAT2 */
"GPIO134_B9", /* DAT3 */
"GPIO135_A9", /* DAT4 */
"GPIO136_C7", /* DAT5 */
"GPIO137_A7", /* DAT6 */
"GPIO138_C5"; /* DAT7 */
ste,config = <&in_wkup_pdis>;
};
};
};
sdi4 {
/* This is the eMMC 8 bits wide, usually PCB-mounted eMMC */
sdi4_default_mode: sdi4_default {
default_mux {
function = "mc4";
groups = "mc4_a_1";
};
default_cfg1 {
pins = "GPIO203_AE23"; /* CLK */
ste,config = <&out_lo>;
};
default_cfg2 {
pins = "GPIO202_AF25"; /* FBCLK */
ste,config = <&in_nopull>;
};
default_cfg3 {
pins =
"GPIO201_AF24", /* CMD */
"GPIO200_AH26", /* DAT0 */
"GPIO199_AH23", /* DAT1 */
"GPIO198_AG25", /* DAT2 */
"GPIO197_AH24", /* DAT3 */
"GPIO207_AJ23", /* DAT4 */
"GPIO206_AG24", /* DAT5 */
"GPIO205_AG23", /* DAT6 */
"GPIO204_AF23"; /* DAT7 */
ste,config = <&in_pu>;
};
};
sdi4_sleep_mode: sdi4_sleep {
sleep_cfg1 {
pins = "GPIO203_AE23"; /* CLK */
ste,config = <&out_lo_wkup_pdis>;
};
sleep_cfg2 {
pins =
"GPIO202_AF25", /* FBCLK */
"GPIO201_AF24", /* CMD */
"GPIO200_AH26", /* DAT0 */
"GPIO199_AH23", /* DAT1 */
"GPIO198_AG25", /* DAT2 */
"GPIO197_AH24", /* DAT3 */
"GPIO207_AJ23", /* DAT4 */
"GPIO206_AG24", /* DAT5 */
"GPIO205_AG23", /* DAT6 */
"GPIO204_AF23"; /* DAT7 */
ste,config = <&slpm_in_wkup_pdis>;
};
};
};
/*
* Multi-rate serial ports (MSPs) - MSP3 output is internal and
* cannot be muxed onto any pins.
*/
msp0 {
msp0_default_mode: msp0_default {
default_msp0_mux {
function = "msp0";
groups = "msp0txrx_a_1", "msp0tfstck_a_1";
};
default_msp0_cfg {
pins =
"GPIO12_AC4", /* TXD */
"GPIO15_AC3", /* RXD */
"GPIO13_AF3", /* TFS */
"GPIO14_AE3"; /* TCK */
ste,config = <&in_nopull>;
};
};
};
msp1 {
msp1_default_mode: msp1_default {
default_mux {
function = "msp1";
groups = "msp1txrx_a_1", "msp1_a_1";
};
default_cfg1 {
pins = "GPIO33_AF2";
ste,config = <&out_lo>;
};
default_cfg2 {
pins =
"GPIO34_AE1",
"GPIO35_AE2",
"GPIO36_AG2";
ste,config = <&in_nopull>;
};
};
};
msp2 {
msp2_default_mode: msp2_default {
/* MSP2 usually used for HDMI audio */
default_mux {
function = "msp2";
groups = "msp2_a_1";
};
default_cfg1 {
pins =
"GPIO193_AH27", /* TXD */
"GPIO194_AF27", /* TCK */
"GPIO195_AG28"; /* TFS */
ste,config = <&in_pd>;
};
default_cfg2 {
pins = "GPIO196_AG26"; /* RXD */
ste,config = <&out_lo>;
};
};
};
musb {
musb_default_mode: musb_default {
default_mux {
function = "usb";
groups = "usb_a_1";
};
default_cfg1 {
pins =
"GPIO256_AF28", /* NXT */
"GPIO258_AD29", /* XCLK */
"GPIO259_AC29", /* DIR */
"GPIO260_AD28", /* DAT7 */
"GPIO261_AD26", /* DAT6 */
"GPIO262_AE26", /* DAT5 */
"GPIO263_AG29", /* DAT4 */
"GPIO264_AE27", /* DAT3 */
"GPIO265_AD27", /* DAT2 */
"GPIO266_AC28", /* DAT1 */
"GPIO267_AC27"; /* DAT0 */
ste,config = <&in_nopull>;
};
default_cfg2 {
pins = "GPIO257_AE29"; /* STP */
ste,config = <&out_hi>;
};
};
musb_sleep_mode: musb_sleep {
sleep_cfg1 {
pins =
"GPIO256_AF28", /* NXT */
"GPIO258_AD29", /* XCLK */
"GPIO259_AC29"; /* DIR */
ste,config = <&slpm_wkup_pdis_en>;
};
sleep_cfg2 {
pins = "GPIO257_AE29"; /* STP */
ste,config = <&slpm_out_hi_wkup_pdis>;
};
sleep_cfg3 {
pins =
"GPIO260_AD28", /* DAT7 */
"GPIO261_AD26", /* DAT6 */
"GPIO262_AE26", /* DAT5 */
"GPIO263_AG29", /* DAT4 */
"GPIO264_AE27", /* DAT3 */
"GPIO265_AD27", /* DAT2 */
"GPIO266_AC28", /* DAT1 */
"GPIO267_AC27"; /* DAT0 */
ste,config = <&slpm_in_wkup_pdis_en>;
};
};
};
mcde {
lcd_default_mode: lcd_default {
default_mux1 {

79
arch/arm/boot/dts/ste-href-tvk1281618-r2.dtsi Normal file
View File

@ -0,0 +1,79 @@
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* Device Tree for the TVK1281618 R2 UIB
*/
#include "ste-href-tvk1281618.dtsi"
/ {
soc {
i2c@80128000 {
lsm303dlh@18 {
/* Accelerometer */
compatible = "st,lsm303dlh-accel";
st,drdy-int-pin = <1>;
drive-open-drain;
reg = <0x18>;
vdd-supply = <&ab8500_ldo_aux1_reg>;
vddio-supply = <&db8500_vsmps2_reg>;
pinctrl-names = "default";
pinctrl-0 = <&accel_tvk_mode>;
/*
* These interrupts cannot be used: the other component
* ST-Micro L3D4200D gyro that is connected to the same lines
* cannot set its DRDY line to open drain, so it cannot be
* shared with other peripherals. The should be defined for
* the falling edge if they could be wired together.
*
* interrupts-extended =
* <&gpio1 0 IRQ_TYPE_EDGE_FALLING>,
* <&gpio2 19 IRQ_TYPE_EDGE_FALLING>;
*/
};
lsm303dlh@1e {
/* Magnetometer */
compatible = "st,lsm303dlh-magn";
reg = <0x1e>;
vdd-supply = <&ab8500_ldo_aux1_reg>;
vddio-supply = <&db8500_vsmps2_reg>;
/*
* These interrupts cannot be used: the other component
* ST-Micro L3D4200D gyro that is connected to the same lines
* cannot set its DRDY line to open drain, so it cannot be
* shared with other peripherals. The should be defined for
* the falling edge if they could be wired together.
*
* interrupts-extended =
* <&gpio1 0 IRQ_TYPE_EDGE_FALLING>,
* <&gpio2 19 IRQ_TYPE_EDGE_FALLING>;
*/
};
lis331dl@1c {
/* Accelerometer */
compatible = "st,lis331dl-accel";
st,drdy-int-pin = <1>;
reg = <0x1c>;
vdd-supply = <&ab8500_ldo_aux1_reg>;
vddio-supply = <&db8500_vsmps2_reg>;
pinctrl-names = "default";
pinctrl-0 = <&accel_tvk_mode>;
interrupt-parent = <&gpio2>;
/* INT2 would need to be open drain */
interrupts = <18 IRQ_TYPE_EDGE_RISING>,
<19 IRQ_TYPE_EDGE_RISING>;
};
};
mcde@a0350000 {
status = "okay";
dsi@a0351000 {
panel {
compatible = "samsung,s6d16d0";
reg = <0>;
vdd1-supply = <&ab8500_ldo_aux1_reg>;
reset-gpios = <&gpio2 1 GPIO_ACTIVE_LOW>;
};
};
};
};
};

58
arch/arm/boot/dts/ste-href-tvk1281618-r3.dtsi Normal file
View File

@ -0,0 +1,58 @@
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* Device Tree for the TVK1281618 R2 UIB
*/
#include "ste-href-tvk1281618.dtsi"
/ {
soc {
i2c@80128000 {
/* Marked:
* 129
* M35
* L3GD20
*/
l3gd20@6a {
/* Gyroscope */
compatible = "st,l3gd20";
status = "disabled";
st,drdy-int-pin = <1>;
drive-open-drain;
reg = <0x6a>; // 0x6a or 0x6b
vdd-supply = <&ab8500_ldo_aux1_reg>;
vddio-supply = <&db8500_vsmps2_reg>;
};
/*
* Marked:
* 2122
* C3H
* DQEEE
* LIS3DH?
*/
lis3dh@18 {
/* Accelerometer */
compatible = "st,lis3dh-accel";
st,drdy-int-pin = <1>;
reg = <0x18>;
vdd-supply = <&ab8500_ldo_aux1_reg>;
vddio-supply = <&db8500_vsmps2_reg>;
pinctrl-names = "default";
pinctrl-0 = <&accel_tvk_mode>;
};
};
mcde@a0350000 {
status = "okay";
dsi@a0351000 {
panel {
compatible = "sony,acx424akp";
reg = <0>;
vddi-supply = <&ab8500_ldo_aux1_reg>;
reset-gpios = <&gpio2 1 GPIO_ACTIVE_LOW>;
};
};
};
};
};

71
arch/arm/boot/dts/ste-href-tvk1281618.dtsi
View File

@ -2,7 +2,7 @@
/*
* Copyright 2012 ST-Ericsson AB
*
* Device Tree for the TVK1281618 UIB
* Device Tree for the TVK1281618 family of UIBs
*/
#include <dt-bindings/interrupt-controller/irq.h>
@ -81,62 +81,8 @@
};
};
};
/* Sensors mounted on this board variant */
/* Sensors mounted on all board variants */
i2c@80128000 {
lsm303dlh@18 {
/* Accelerometer */
compatible = "st,lsm303dlh-accel";
st,drdy-int-pin = <1>;
drive-open-drain;
reg = <0x18>;
vdd-supply = <&ab8500_ldo_aux1_reg>;
vddio-supply = <&db8500_vsmps2_reg>;
pinctrl-names = "default";
pinctrl-0 = <&accel_tvk_mode>;
/*
* These interrupts cannot be used: the other component
* ST-Micro L3D4200D gyro that is connected to the same lines
* cannot set its DRDY line to open drain, so it cannot be
* shared with other peripherals. The should be defined for
* the falling edge if they could be wired together.
*
* interrupts-extended =
* <&gpio1 0 IRQ_TYPE_EDGE_FALLING>,
* <&gpio2 19 IRQ_TYPE_EDGE_FALLING>;
*/
};
lsm303dlh@1e {
/* Magnetometer */
compatible = "st,lsm303dlh-magn";
reg = <0x1e>;
vdd-supply = <&ab8500_ldo_aux1_reg>;
vddio-supply = <&db8500_vsmps2_reg>;
/*
* These interrupts cannot be used: the other component
* ST-Micro L3D4200D gyro that is connected to the same lines
* cannot set its DRDY line to open drain, so it cannot be
* shared with other peripherals. The should be defined for
* the falling edge if they could be wired together.
*
* interrupts-extended =
* <&gpio1 0 IRQ_TYPE_EDGE_FALLING>,
* <&gpio2 19 IRQ_TYPE_EDGE_FALLING>;
*/
};
lis331dl@1c {
/* Accelerometer */
compatible = "st,lis331dl-accel";
st,drdy-int-pin = <1>;
reg = <0x1c>;
vdd-supply = <&ab8500_ldo_aux1_reg>;
vddio-supply = <&db8500_vsmps2_reg>;
pinctrl-names = "default";
pinctrl-0 = <&accel_tvk_mode>;
interrupt-parent = <&gpio2>;
/* INT2 would need to be open drain */
interrupts = <18 IRQ_TYPE_EDGE_RISING>,
<19 IRQ_TYPE_EDGE_RISING>;
};
ak8974@f {
/* Magnetometer */
compatible = "asahi-kasei,ak8974";
@ -268,18 +214,5 @@
};
};
};
mcde@a0350000 {
status = "okay";
dsi@a0351000 {
panel {
compatible = "samsung,s6d16d0";
reg = <0>;
vdd1-supply = <&ab8500_ldo_aux1_reg>;
reset-gpios = <&gpio2 1 GPIO_ACTIVE_LOW>;
};
};
};
};
};

67
arch/arm/boot/dts/ste-href.dtsi
View File

@ -4,7 +4,6 @@
*/
#include <dt-bindings/interrupt-controller/irq.h>
#include "ste-dbx5x0.dtsi"
#include "ste-href-family-pinctrl.dtsi"
/ {
@ -16,41 +15,44 @@
soc {
uart@80120000 {
pinctrl-names = "default", "sleep";
pinctrl-0 = <&uart0_default_mode>;
pinctrl-1 = <&uart0_sleep_mode>;
pinctrl-0 = <&u0_a_1_default>;
pinctrl-1 = <&u0_a_1_sleep>;
status = "okay";
};
/* This UART is unused and thus left disabled */
uart@80121000 {
pinctrl-names = "default", "sleep";
pinctrl-0 = <&uart1_default_mode>;
pinctrl-1 = <&uart1_sleep_mode>;
pinctrl-0 = <&u1rxtx_a_1_default>;
pinctrl-1 = <&u1rxtx_a_1_sleep>;
};
uart@80007000 {
pinctrl-names = "default", "sleep";
pinctrl-0 = <&uart2_default_mode>;
pinctrl-1 = <&uart2_sleep_mode>;
pinctrl-0 = <&u2rxtx_c_1_default>;
pinctrl-1 = <&u2rxtx_c_1_sleep>;
status = "okay";
};
i2c@80004000 {
pinctrl-names = "default","sleep";
pinctrl-0 = <&i2c0_default_mode>;
pinctrl-1 = <&i2c0_sleep_mode>;
pinctrl-0 = <&i2c0_a_1_default>;
pinctrl-1 = <&i2c0_a_1_sleep>;
status = "okay";
};
i2c@80122000 {
pinctrl-names = "default","sleep";
pinctrl-0 = <&i2c1_default_mode>;
pinctrl-1 = <&i2c1_sleep_mode>;
pinctrl-0 = <&i2c1_b_2_default>;
pinctrl-1 = <&i2c1_b_2_sleep>;
status = "okay";
};
i2c@80128000 {
pinctrl-names = "default","sleep";
pinctrl-0 = <&i2c2_default_mode>;
pinctrl-1 = <&i2c2_sleep_mode>;
pinctrl-0 = <&i2c2_b_2_default>;
pinctrl-1 = <&i2c2_b_2_sleep>;
status = "okay";
lp5521@33 {
compatible = "national,lp5521";
reg = <0x33>;
@ -96,8 +98,9 @@
i2c@80110000 {
pinctrl-names = "default","sleep";
pinctrl-0 = <&i2c3_default_mode>;
pinctrl-1 = <&i2c3_sleep_mode>;
pinctrl-0 = <&i2c3_c_2_default>;
pinctrl-1 = <&i2c3_c_2_sleep>;
status = "okay";
};
/* ST6G3244ME level translator for 1.8/2.9 V */
@ -132,8 +135,8 @@
vmmc-supply = <&ab8500_ldo_aux3_reg>;
vqmmc-supply = <&vmmci>;
pinctrl-names = "default", "sleep";
pinctrl-0 = <&sdi0_default_mode>;
pinctrl-1 = <&sdi0_sleep_mode>;
pinctrl-0 = <&mc0_a_1_default &sdi0_default_mode>;
pinctrl-1 = <&mc0_a_1_sleep>;
status = "okay";
};
@ -145,8 +148,8 @@
bus-width = <4>;
non-removable;
pinctrl-names = "default", "sleep";
pinctrl-0 = <&sdi1_default_mode>;
pinctrl-1 = <&sdi1_sleep_mode>;
pinctrl-0 = <&mc1_a_1_default>;
pinctrl-1 = <&mc1_a_1_sleep>;
status = "okay";
};
@ -160,8 +163,8 @@
non-removable;
vmmc-supply = <&db8500_vsmps2_reg>;
pinctrl-names = "default", "sleep";
pinctrl-0 = <&sdi2_default_mode>;
pinctrl-1 = <&sdi2_sleep_mode>;
pinctrl-0 = <&mc2_a_1_default>;
pinctrl-1 = <&mc2_a_1_sleep>;
status = "okay";
};
@ -175,27 +178,27 @@
non-removable;
vmmc-supply = <&ab8500_ldo_aux2_reg>;
pinctrl-names = "default", "sleep";
pinctrl-0 = <&sdi4_default_mode>;
pinctrl-1 = <&sdi4_sleep_mode>;
pinctrl-0 = <&mc4_a_1_default>;
pinctrl-1 = <&mc4_a_1_sleep>;
status = "okay";
};
msp0: msp@80123000 {
pinctrl-names = "default";
pinctrl-0 = <&msp0_default_mode>;
pinctrl-0 = <&msp0txrxtfstck_a_1_default>;
status = "okay";
};
msp1: msp@80124000 {
pinctrl-names = "default";
pinctrl-0 = <&msp1_default_mode>;
pinctrl-0 = <&msp1txrx_a_1_default>;
status = "okay";
};
msp2: msp@80117000 {
pinctrl-names = "default";
pinctrl-0 = <&msp2_default_mode>;
pinctrl-0 = <&msp2_a_1_default>;
};
msp3: msp@80125000 {
@ -209,8 +212,8 @@
ab8500_usb {
pinctrl-names = "default", "sleep";
pinctrl-0 = <&musb_default_mode>;
pinctrl-1 = <&musb_sleep_mode>;
pinctrl-0 = <&usb_a_1_default>;
pinctrl-1 = <&usb_a_1_sleep>;
};
ab8500-regulators {
@ -257,6 +260,14 @@
};
};
pinctrl {
sdi0 {
sdi0_default_mode: sdi0_default {
/* Some boards set additional settings here */
};
};
};
mcde@a0350000 {
pinctrl-names = "default", "sleep";
pinctrl-0 = <&lcd_default_mode>;

22
arch/arm/boot/dts/ste-href520-tvk.dts Normal file
View File

@ -0,0 +1,22 @@
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* Device Tree for the HREF520 version with the TVK1281618 UIB
*/
/dts-v1/;
#include "ste-db8520.dtsi"
#include "ste-hrefv60plus.dtsi"
#include "ste-href-tvk1281618-r3.dtsi"
/ {
model = "ST-Ericsson HREF520 and TVK1281618 UIB";
compatible = "st-ericsson,href520", "st-ericsson,u8500";
soc {
vmmci: regulator-gpio {
gpios = <&gpio0 5 GPIO_ACTIVE_HIGH>;
enable-gpio = <&gpio2 14 GPIO_ACTIVE_HIGH>;
enable-active-high;
};
};
};

10
arch/arm/boot/dts/ste-hrefprev60-stuib.dts
View File

@ -4,8 +4,7 @@
*/
/dts-v1/;
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/interrupt-controller/irq.h>
#include "ste-db8500.dtsi"
#include "ste-hrefprev60.dtsi"
#include "ste-href-stuib.dtsi"
@ -13,13 +12,6 @@
model = "ST-Ericsson HREF (pre-v60) and ST UIB";
compatible = "st-ericsson,mop500", "st-ericsson,u8500";
/* This stablilizes the serial port enumeration */
aliases {
serial0 = &ux500_serial0;
serial1 = &ux500_serial1;
serial2 = &ux500_serial2;
};
soc {
/* Reset line for the BU21013 touchscreen */
i2c@80110000 {

10
arch/arm/boot/dts/ste-hrefprev60-tvk.dts
View File

@ -4,17 +4,11 @@
*/
/dts-v1/;
#include "ste-db8500.dtsi"
#include "ste-hrefprev60.dtsi"
#include "ste-href-tvk1281618.dtsi"
#include "ste-href-tvk1281618-r2.dtsi"
/ {
model = "ST-Ericsson HREF (pre-v60) and TVK1281618 UIB";
compatible = "st-ericsson,mop500", "st-ericsson,u8500";
/* This stablilizes the serial port enumeration */
aliases {
serial0 = &ux500_serial0;
serial1 = &ux500_serial1;
serial2 = &ux500_serial2;
};
};

2
arch/arm/boot/dts/ste-hrefprev60.dtsi
View File

@ -5,7 +5,6 @@
* Device Tree for the HREF+ prior to the v60 variant.
*/
#include "ste-dbx5x0.dtsi"
#include "ste-href-ab8500.dtsi"
#include "ste-href.dtsi"
@ -58,6 +57,7 @@
*/
pinctrl-names = "default";
pinctrl-0 = <&ssp0_hrefprev60_mode>;
status = "okay";
};
// External Micro SD slot

10
arch/arm/boot/dts/ste-hrefv60plus-stuib.dts
View File

@ -6,8 +6,7 @@
*/
/dts-v1/;
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/interrupt-controller/irq.h>
#include "ste-db8500.dtsi"
#include "ste-hrefv60plus.dtsi"
#include "ste-href-stuib.dtsi"
@ -15,13 +14,6 @@
model = "ST-Ericsson HREF (v60+) and ST UIB";
compatible = "st-ericsson,hrefv60+", "st-ericsson,u8500";
/* This stablilizes the serial port enumeration */
aliases {
serial0 = &ux500_serial0;
serial1 = &ux500_serial1;
serial2 = &ux500_serial2;
};
soc {
/* Reset line for the BU21013 touchscreen */
i2c@80110000 {

10
arch/arm/boot/dts/ste-hrefv60plus-tvk.dts
View File

@ -6,17 +6,11 @@
*/
/dts-v1/;
#include "ste-db8500.dtsi"
#include "ste-hrefv60plus.dtsi"
#include "ste-href-tvk1281618.dtsi"
#include "ste-href-tvk1281618-r2.dtsi"
/ {
model = "ST-Ericsson HREF (v60+) and TVK1281618 UIB";
compatible = "st-ericsson,hrefv60+", "st-ericsson,u8500";
/* This stablilizes the serial port enumeration */
aliases {
serial0 = &ux500_serial0;
serial1 = &ux500_serial1;
serial2 = &ux500_serial2;
};
};

1
arch/arm/boot/dts/ste-hrefv60plus.dtsi
View File

@ -3,7 +3,6 @@
* Copyright 2012 ST-Ericsson AB
*/
#include "ste-dbx5x0.dtsi"
#include "ste-href-ab8500.dtsi"
#include "ste-href.dtsi"

5
arch/arm/boot/dts/ste-nomadik-pinctrl.dtsi
View File

@ -25,6 +25,11 @@
ste,output = <OUTPUT_LOW>;
};
gpio_in_nopull: gpio_input_nopull {
ste,gpio = <GPIOMODE_ENABLED>;
ste,input = <INPUT_NOPULL>;
};
gpio_in_pu: gpio_input_pull_up {
ste,gpio = <GPIOMODE_ENABLED>;
ste,input = <INPUT_PULLUP>;

70
arch/arm/boot/dts/ste-snowball.dts
View File

@ -4,7 +4,7 @@
*/
/dts-v1/;
#include "ste-dbx5x0.dtsi"
#include "ste-db8500.dtsi"
#include "ste-href-ab8500.dtsi"
#include "ste-href-family-pinctrl.dtsi"
@ -12,13 +12,6 @@
model = "Calao Systems Snowball platform with device tree";
compatible = "calaosystems,snowball-a9500", "st-ericsson,u9500";
/* This stablilizes the serial port enumeration */
aliases {
serial0 = &ux500_serial0;
serial1 = &ux500_serial1;
serial2 = &ux500_serial2;
};
memory {
device_type = "memory";
reg = <0x00000000 0x20000000>;
@ -156,19 +149,19 @@
msp0: msp@80123000 {
pinctrl-names = "default";
pinctrl-0 = <&msp0_default_mode>;
pinctrl-0 = <&msp0txrxtfstck_a_1_default>;
status = "okay";
};
msp1: msp@80124000 {
pinctrl-names = "default";
pinctrl-0 = <&msp1_default_mode>;
pinctrl-0 = <&msp1txrx_a_1_default>;
status = "okay";
};
msp2: msp@80117000 {
pinctrl-names = "default";
pinctrl-0 = <&msp2_default_mode>;
pinctrl-0 = <&msp2_a_1_default>;
};
msp3: msp@80125000 {
@ -238,8 +231,8 @@
vmmc-supply = <&ab8500_ldo_aux3_reg>;
vqmmc-supply = <&vmmci>;
pinctrl-names = "default", "sleep";
pinctrl-0 = <&sdi0_default_mode>;
pinctrl-1 = <&sdi0_sleep_mode>;
pinctrl-0 = <&mc0_a_1_default &sdi0_default_mode>;
pinctrl-1 = <&mc0_a_1_sleep>;
/* GPIO218 MMC_CD */
cd-gpios = <&gpio6 26 GPIO_ACTIVE_LOW>;
@ -253,8 +246,8 @@
max-frequency = <100000000>;
bus-width = <4>;
pinctrl-names = "default", "sleep";
pinctrl-0 = <&sdi1_default_mode>;
pinctrl-1 = <&sdi1_sleep_mode>;
pinctrl-0 = <&mc1_a_1_default>;
pinctrl-1 = <&mc1_a_1_sleep>;
status = "okay";
};
@ -263,7 +256,7 @@
sdi2_per3@80005000 {
arm,primecell-periphid = <0x10480180>;
pinctrl-names = "default";
pinctrl-0 = <&sdi2_sleep_mode>;
pinctrl-0 = <&mc2_a_1_sleep>;
status = "okay";
};
@ -276,49 +269,52 @@
cap-mmc-highspeed;
vmmc-supply = <&ab8500_ldo_aux2_reg>;
pinctrl-names = "default", "sleep";
pinctrl-0 = <&sdi4_default_mode>;
pinctrl-1 = <&sdi4_sleep_mode>;
pinctrl-0 = <&mc4_a_1_default>;
pinctrl-1 = <&mc4_a_1_sleep>;
status = "okay";
};
uart@80120000 {
pinctrl-names = "default", "sleep";
pinctrl-0 = <&uart0_default_mode>;
pinctrl-1 = <&uart0_sleep_mode>;
pinctrl-0 = <&u0_a_1_default>;
pinctrl-1 = <&u0_a_1_sleep>;
status = "okay";
};
/* This UART is unused and thus left disabled */
uart@80121000 {
pinctrl-names = "default", "sleep";
pinctrl-0 = <&uart1_default_mode>;
pinctrl-1 = <&uart1_sleep_mode>;
pinctrl-0 = <&u1rxtx_a_1_default>;
pinctrl-1 = <&u1rxtx_a_1_sleep>;
};
uart@80007000 {
pinctrl-names = "default", "sleep";
pinctrl-0 = <&uart2_default_mode>;
pinctrl-1 = <&uart2_sleep_mode>;
pinctrl-0 = <&u2rxtx_c_1_default>;
pinctrl-1 = <&u2rxtx_c_1_sleep>;
status = "okay";
};
i2c@80004000 {
pinctrl-names = "default","sleep";
pinctrl-0 = <&i2c0_default_mode>;
pinctrl-1 = <&i2c0_sleep_mode>;
pinctrl-0 = <&i2c0_a_1_default>;
pinctrl-1 = <&i2c0_a_1_sleep>;
status = "okay";
};
i2c@80122000 {
pinctrl-names = "default","sleep";
pinctrl-0 = <&i2c1_default_mode>;
pinctrl-1 = <&i2c1_sleep_mode>;
pinctrl-0 = <&i2c1_b_2_default>;
pinctrl-1 = <&i2c1_b_2_sleep>;
status = "okay";
};
i2c@80128000 {
pinctrl-names = "default","sleep";
pinctrl-0 = <&i2c2_default_mode>;
pinctrl-1 = <&i2c2_sleep_mode>;
pinctrl-0 = <&i2c2_b_2_default>;
pinctrl-1 = <&i2c2_b_2_sleep>;
status = "okay";
lsm303dlh@18 {
/* Accelerometer */
compatible = "st,lsm303dlh-accel";
@ -367,20 +363,18 @@
i2c@80110000 {
pinctrl-names = "default","sleep";
pinctrl-0 = <&i2c3_default_mode>;
pinctrl-1 = <&i2c3_sleep_mode>;
pinctrl-0 = <&i2c3_c_2_default>;
pinctrl-1 = <&i2c3_c_2_sleep>;
status = "okay";
};
spi@80002000 {
pinctrl-names = "default";
pinctrl-0 = <&ssp0_snowball_mode>;
status = "okay";
};
prcmu@80157000 {
cpufreq {
status = "okay";
};
ab8500 {
ab8500-gpio {
/*
@ -406,8 +400,8 @@
ab8500_usb {
pinctrl-names = "default", "sleep";
pinctrl-0 = <&musb_default_mode>;
pinctrl-1 = <&musb_sleep_mode>;
pinctrl-0 = <&usb_a_1_default>;
pinctrl-1 = <&usb_a_1_sleep>;
};
ext_regulators: ab8500-ext-regulators {