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docs: perf: Minimal introduction the the CXL PMU device and driver
Very basic introduction to the device and the current driver support provided. I expect to expand on this in future versions of this patch set. Reviewed-by: Dave Jiang <dave.jiang@intel.com> Reviewed-by: Kan Liang <kan.liang@linux.intel.com> Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Link: https://lore.kernel.org/r/20230526095824.16336-6-Jonathan.Cameron@huawei.com Signed-off-by: Dan Williams <dan.j.williams@intel.com>
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Documentation/admin-guide/perf/cxl.rst
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Documentation/admin-guide/perf/cxl.rst
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.. SPDX-License-Identifier: GPL-2.0
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======================================
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CXL Performance Monitoring Unit (CPMU)
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======================================
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The CXL rev 3.0 specification provides a definition of CXL Performance
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Monitoring Unit in section 13.2: Performance Monitoring.
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CXL components (e.g. Root Port, Switch Upstream Port, End Point) may have
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any number of CPMU instances. CPMU capabilities are fully discoverable from
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the devices. The specification provides event definitions for all CXL protocol
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message types and a set of additional events for things commonly counted on
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CXL devices (e.g. DRAM events).
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CPMU driver
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===========
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The CPMU driver registers a perf PMU with the name pmu_mem<X>.<Y> on the CXL bus
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representing the Yth CPMU for memX.
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/sys/bus/cxl/device/pmu_mem<X>.<Y>
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The associated PMU is registered as
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/sys/bus/event_sources/devices/cxl_pmu_mem<X>.<Y>
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In common with other CXL bus devices, the id has no specific meaning and the
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relationship to specific CXL device should be established via the device parent
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of the device on the CXL bus.
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PMU driver provides description of available events and filter options in sysfs.
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The "format" directory describes all formats of the config (event vendor id,
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group id and mask) config1 (threshold, filter enables) and config2 (filter
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parameters) fields of the perf_event_attr structure. The "events" directory
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describes all documented events show in perf list.
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The events shown in perf list are the most fine grained events with a single
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bit of the event mask set. More general events may be enable by setting
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multiple mask bits in config. For example, all Device to Host Read Requests
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may be captured on a single counter by setting the bits for all of
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* d2h_req_rdcurr
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* d2h_req_rdown
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* d2h_req_rdshared
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* d2h_req_rdany
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* d2h_req_rdownnodata
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Example of usage::
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$#perf list
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cxl_pmu_mem0.0/clock_ticks/ [Kernel PMU event]
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cxl_pmu_mem0.0/d2h_req_rdshared/ [Kernel PMU event]
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cxl_pmu_mem0.0/h2d_req_snpcur/ [Kernel PMU event]
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cxl_pmu_mem0.0/h2d_req_snpdata/ [Kernel PMU event]
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cxl_pmu_mem0.0/h2d_req_snpinv/ [Kernel PMU event]
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-----------------------------------------------------------
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$# perf stat -a -e cxl_pmu_mem0.0/clock_ticks/ -e cxl_pmu_mem0.0/d2h_req_rdshared/
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Vendor specific events may also be available and if so can be used via
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$# perf stat -a -e cxl_pmu_mem0.0/vid=VID,gid=GID,mask=MASK/
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The driver does not support sampling so "perf record" is unsupported.
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It only supports system-wide counting so attaching to a task is
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unsupported.
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@ -21,3 +21,4 @@ Performance monitor support
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alibaba_pmu
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nvidia-pmu
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meson-ddr-pmu
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cxl
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@ -5197,6 +5197,7 @@ COMPUTE EXPRESS LINK PMU (CPMU)
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M: Jonathan Cameron <jonathan.cameron@huawei.com>
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L: linux-cxl@vger.kernel.org
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S: Maintained
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F: Documentation/admin-guide/perf/cxl.rst
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F: drivers/perf/cxl_pmu.c
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CONEXANT ACCESSRUNNER USB DRIVER
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