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KVM: SVM/SEV/SEV-ES: Rework intercepts
Currently SVM setup is done sequentially in init_vmcb() -> sev_init_vmcb() -> sev_es_init_vmcb() and tries keeping SVM/SEV/SEV-ES bits separated. One of the exceptions is DR intercepts which is for SEV-ES before sev_es_init_vmcb() runs. Move the SEV-ES intercept setup to sev_es_init_vmcb(). From now on set_dr_intercepts()/clr_dr_intercepts() handle SVM/SEV only. No functional change intended. Suggested-by: Sean Christopherson <seanjc@google.com> Signed-off-by: Alexey Kardashevskiy <aik@amd.com> Reviewed-by: Santosh Shukla <santosh.shukla@amd.com> Reviewed-by: Tom Lendacky <thomas.lendacky@amd.com> Link: https://lore.kernel.org/r/20230615063757.3039121-6-aik@amd.com [sean: drop comment about intercepting DR7] Signed-off-by: Sean Christopherson <seanjc@google.com>
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@ -2951,6 +2951,7 @@ int sev_es_string_io(struct vcpu_svm *svm, int size, unsigned int port, int in)
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static void sev_es_init_vmcb(struct vcpu_svm *svm)
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{
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struct vmcb *vmcb = svm->vmcb01.ptr;
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struct kvm_vcpu *vcpu = &svm->vcpu;
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svm->vmcb->control.nested_ctl |= SVM_NESTED_CTL_SEV_ES_ENABLE;
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@ -2979,6 +2980,11 @@ static void sev_es_init_vmcb(struct vcpu_svm *svm)
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svm_set_intercept(svm, TRAP_CR4_WRITE);
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svm_set_intercept(svm, TRAP_CR8_WRITE);
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vmcb->control.intercepts[INTERCEPT_DR] = 0;
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vmcb_set_intercept(&vmcb->control, INTERCEPT_DR7_READ);
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vmcb_set_intercept(&vmcb->control, INTERCEPT_DR7_WRITE);
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recalc_intercepts(svm);
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/* Can't intercept XSETBV, HV can't modify XCR0 directly */
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svm_clr_intercept(svm, INTERCEPT_XSETBV);
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@ -681,23 +681,20 @@ static void set_dr_intercepts(struct vcpu_svm *svm)
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{
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struct vmcb *vmcb = svm->vmcb01.ptr;
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if (!sev_es_guest(svm->vcpu.kvm)) {
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vmcb_set_intercept(&vmcb->control, INTERCEPT_DR0_READ);
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vmcb_set_intercept(&vmcb->control, INTERCEPT_DR1_READ);
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vmcb_set_intercept(&vmcb->control, INTERCEPT_DR2_READ);
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vmcb_set_intercept(&vmcb->control, INTERCEPT_DR3_READ);
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vmcb_set_intercept(&vmcb->control, INTERCEPT_DR4_READ);
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vmcb_set_intercept(&vmcb->control, INTERCEPT_DR5_READ);
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vmcb_set_intercept(&vmcb->control, INTERCEPT_DR6_READ);
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vmcb_set_intercept(&vmcb->control, INTERCEPT_DR0_WRITE);
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vmcb_set_intercept(&vmcb->control, INTERCEPT_DR1_WRITE);
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vmcb_set_intercept(&vmcb->control, INTERCEPT_DR2_WRITE);
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vmcb_set_intercept(&vmcb->control, INTERCEPT_DR3_WRITE);
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vmcb_set_intercept(&vmcb->control, INTERCEPT_DR4_WRITE);
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vmcb_set_intercept(&vmcb->control, INTERCEPT_DR5_WRITE);
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vmcb_set_intercept(&vmcb->control, INTERCEPT_DR6_WRITE);
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}
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vmcb_set_intercept(&vmcb->control, INTERCEPT_DR0_READ);
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vmcb_set_intercept(&vmcb->control, INTERCEPT_DR1_READ);
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vmcb_set_intercept(&vmcb->control, INTERCEPT_DR2_READ);
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vmcb_set_intercept(&vmcb->control, INTERCEPT_DR3_READ);
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vmcb_set_intercept(&vmcb->control, INTERCEPT_DR4_READ);
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vmcb_set_intercept(&vmcb->control, INTERCEPT_DR5_READ);
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vmcb_set_intercept(&vmcb->control, INTERCEPT_DR6_READ);
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vmcb_set_intercept(&vmcb->control, INTERCEPT_DR0_WRITE);
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vmcb_set_intercept(&vmcb->control, INTERCEPT_DR1_WRITE);
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vmcb_set_intercept(&vmcb->control, INTERCEPT_DR2_WRITE);
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vmcb_set_intercept(&vmcb->control, INTERCEPT_DR3_WRITE);
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vmcb_set_intercept(&vmcb->control, INTERCEPT_DR4_WRITE);
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vmcb_set_intercept(&vmcb->control, INTERCEPT_DR5_WRITE);
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vmcb_set_intercept(&vmcb->control, INTERCEPT_DR6_WRITE);
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vmcb_set_intercept(&vmcb->control, INTERCEPT_DR7_READ);
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vmcb_set_intercept(&vmcb->control, INTERCEPT_DR7_WRITE);
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@ -710,12 +707,6 @@ static void clr_dr_intercepts(struct vcpu_svm *svm)
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vmcb->control.intercepts[INTERCEPT_DR] = 0;
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/* DR7 access must remain intercepted for an SEV-ES guest */
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if (sev_es_guest(svm->vcpu.kvm)) {
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vmcb_set_intercept(&vmcb->control, INTERCEPT_DR7_READ);
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vmcb_set_intercept(&vmcb->control, INTERCEPT_DR7_WRITE);
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}
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recalc_intercepts(svm);
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}
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