Merge branch 'remotes/lorenzo/pci/mediatek'

- Use devm resource parser in mediatek (Honghui Zhang)

  - Remove unused mediatek "num-lanes" DT property (Honghui Zhang)

* remotes/lorenzo/pci/mediatek:
  arm64: dts: mt7622: Remove un-used property for PCIe
  arm: dts: mt7623: Remove un-used property for PCIe
  dt-bindings: PCI: MediaTek: Remove un-used property
  PCI: mediatek: Remove un-used variant in struct mtk_pcie_port
  PCI: mediatek: Use devm_of_pci_get_host_bridge_resources() to parse DT
This commit is contained in:
Bjorn Helgaas 2019-01-02 15:31:10 -06:00
commit c266b026ae
4 changed files with 27 additions and 95 deletions

View File

@ -65,7 +65,6 @@ Required properties:
explanation.
- ranges: Sub-ranges distributed from the PCIe controller node. An empty
property is sufficient.
- num-lanes: Number of lanes to use for this port.
Examples for MT7623:
@ -118,7 +117,6 @@ Examples for MT7623:
interrupt-map-mask = <0 0 0 0>;
interrupt-map = <0 0 0 0 &sysirq GIC_SPI 193 IRQ_TYPE_LEVEL_LOW>;
ranges;
num-lanes = <1>;
};
pcie@1,0 {
@ -129,7 +127,6 @@ Examples for MT7623:
interrupt-map-mask = <0 0 0 0>;
interrupt-map = <0 0 0 0 &sysirq GIC_SPI 194 IRQ_TYPE_LEVEL_LOW>;
ranges;
num-lanes = <1>;
};
pcie@2,0 {
@ -140,7 +137,6 @@ Examples for MT7623:
interrupt-map-mask = <0 0 0 0>;
interrupt-map = <0 0 0 0 &sysirq GIC_SPI 195 IRQ_TYPE_LEVEL_LOW>;
ranges;
num-lanes = <1>;
};
};
@ -172,7 +168,6 @@ Examples for MT2712:
#size-cells = <2>;
#interrupt-cells = <1>;
ranges;
num-lanes = <1>;
interrupt-map-mask = <0 0 0 7>;
interrupt-map = <0 0 0 1 &pcie_intc0 0>,
<0 0 0 2 &pcie_intc0 1>,
@ -191,7 +186,6 @@ Examples for MT2712:
#size-cells = <2>;
#interrupt-cells = <1>;
ranges;
num-lanes = <1>;
interrupt-map-mask = <0 0 0 7>;
interrupt-map = <0 0 0 1 &pcie_intc1 0>,
<0 0 0 2 &pcie_intc1 1>,
@ -245,7 +239,6 @@ Examples for MT7622:
#size-cells = <2>;
#interrupt-cells = <1>;
ranges;
num-lanes = <1>;
interrupt-map-mask = <0 0 0 7>;
interrupt-map = <0 0 0 1 &pcie_intc0 0>,
<0 0 0 2 &pcie_intc0 1>,
@ -264,7 +257,6 @@ Examples for MT7622:
#size-cells = <2>;
#interrupt-cells = <1>;
ranges;
num-lanes = <1>;
interrupt-map-mask = <0 0 0 7>;
interrupt-map = <0 0 0 1 &pcie_intc1 0>,
<0 0 0 2 &pcie_intc1 1>,

View File

@ -850,7 +850,6 @@
interrupt-map-mask = <0 0 0 0>;
interrupt-map = <0 0 0 0 &sysirq GIC_SPI 193 IRQ_TYPE_LEVEL_LOW>;
ranges;
num-lanes = <1>;
status = "disabled";
};
@ -862,7 +861,6 @@
interrupt-map-mask = <0 0 0 0>;
interrupt-map = <0 0 0 0 &sysirq GIC_SPI 194 IRQ_TYPE_LEVEL_LOW>;
ranges;
num-lanes = <1>;
status = "disabled";
};
@ -874,7 +872,6 @@
interrupt-map-mask = <0 0 0 0>;
interrupt-map = <0 0 0 0 &sysirq GIC_SPI 195 IRQ_TYPE_LEVEL_LOW>;
ranges;
num-lanes = <1>;
status = "disabled";
};
};

View File

@ -812,7 +812,6 @@
ranges;
status = "disabled";
num-lanes = <1>;
interrupt-map-mask = <0 0 0 7>;
interrupt-map = <0 0 0 1 &pcie_intc0 0>,
<0 0 0 2 &pcie_intc0 1>,
@ -833,7 +832,6 @@
ranges;
status = "disabled";
num-lanes = <1>;
interrupt-map-mask = <0 0 0 7>;
interrupt-map = <0 0 0 1 &pcie_intc1 0>,
<0 0 0 2 &pcie_intc1 1>,

View File

@ -161,7 +161,6 @@ struct mtk_pcie_soc {
* @obff_ck: pointer to OBFF functional block operating clock
* @pipe_ck: pointer to LTSSM and PHY/MAC layer operating clock
* @phy: pointer to PHY control block
* @lane: lane count
* @slot: port slot
* @irq: GIC irq
* @irq_domain: legacy INTx IRQ domain
@ -182,7 +181,6 @@ struct mtk_pcie_port {
struct clk *obff_ck;
struct clk *pipe_ck;
struct phy *phy;
u32 lane;
u32 slot;
int irq;
struct irq_domain *irq_domain;
@ -197,29 +195,20 @@ struct mtk_pcie_port {
* @dev: pointer to PCIe device
* @base: IO mapped register base
* @free_ck: free-run reference clock
* @io: IO resource
* @pio: PIO resource
* @mem: non-prefetchable memory resource
* @busn: bus range
* @offset: IO / Memory offset
* @ports: pointer to PCIe port information
* @soc: pointer to SoC-dependent operations
* @busnr: root bus number
*/
struct mtk_pcie {
struct device *dev;
void __iomem *base;
struct clk *free_ck;
struct resource io;
struct resource pio;
struct resource mem;
struct resource busn;
struct {
resource_size_t mem;
resource_size_t io;
} offset;
struct list_head ports;
const struct mtk_pcie_soc *soc;
unsigned int busnr;
};
static void mtk_pcie_subsys_powerdown(struct mtk_pcie *pcie)
@ -904,12 +893,6 @@ static int mtk_pcie_parse_port(struct mtk_pcie *pcie,
if (!port)
return -ENOMEM;
err = of_property_read_u32(node, "num-lanes", &port->lane);
if (err) {
dev_err(dev, "missing num-lanes property\n");
return err;
}
snprintf(name, sizeof(name), "port%d", slot);
regs = platform_get_resource_byname(pdev, IORESOURCE_MEM, name);
port->base = devm_ioremap_resource(dev, regs);
@ -1045,55 +1028,43 @@ static int mtk_pcie_setup(struct mtk_pcie *pcie)
{
struct device *dev = pcie->dev;
struct device_node *node = dev->of_node, *child;
struct of_pci_range_parser parser;
struct of_pci_range range;
struct resource res;
struct mtk_pcie_port *port, *tmp;
struct pci_host_bridge *host = pci_host_bridge_from_priv(pcie);
struct list_head *windows = &host->windows;
struct resource_entry *win, *tmp_win;
resource_size_t io_base;
int err;
if (of_pci_range_parser_init(&parser, node)) {
dev_err(dev, "missing \"ranges\" property\n");
return -EINVAL;
}
err = devm_of_pci_get_host_bridge_resources(dev, 0, 0xff,
windows, &io_base);
if (err)
return err;
for_each_of_pci_range(&parser, &range) {
err = of_pci_range_to_resource(&range, node, &res);
if (err < 0)
return err;
err = devm_request_pci_bus_resources(dev, windows);
if (err < 0)
return err;
switch (res.flags & IORESOURCE_TYPE_BITS) {
/* Get the I/O and memory ranges from DT */
resource_list_for_each_entry_safe(win, tmp_win, windows) {
switch (resource_type(win->res)) {
case IORESOURCE_IO:
pcie->offset.io = res.start - range.pci_addr;
memcpy(&pcie->pio, &res, sizeof(res));
pcie->pio.name = node->full_name;
pcie->io.start = range.cpu_addr;
pcie->io.end = range.cpu_addr + range.size - 1;
pcie->io.flags = IORESOURCE_MEM;
pcie->io.name = "I/O";
memcpy(&res, &pcie->io, sizeof(res));
err = devm_pci_remap_iospace(dev, win->res, io_base);
if (err) {
dev_warn(dev, "error %d: failed to map resource %pR\n",
err, win->res);
resource_list_destroy_entry(win);
}
break;
case IORESOURCE_MEM:
pcie->offset.mem = res.start - range.pci_addr;
memcpy(&pcie->mem, &res, sizeof(res));
memcpy(&pcie->mem, win->res, sizeof(*win->res));
pcie->mem.name = "non-prefetchable";
break;
case IORESOURCE_BUS:
pcie->busnr = win->res->start;
break;
}
}
err = of_pci_parse_bus_range(node, &pcie->busn);
if (err < 0) {
dev_err(dev, "failed to parse bus ranges property: %d\n", err);
pcie->busn.name = node->name;
pcie->busn.start = 0;
pcie->busn.end = 0xff;
pcie->busn.flags = IORESOURCE_BUS;
}
for_each_available_child_of_node(node, child) {
int slot;
@ -1125,28 +1096,6 @@ static int mtk_pcie_setup(struct mtk_pcie *pcie)
return 0;
}
static int mtk_pcie_request_resources(struct mtk_pcie *pcie)
{
struct pci_host_bridge *host = pci_host_bridge_from_priv(pcie);
struct list_head *windows = &host->windows;
struct device *dev = pcie->dev;
int err;
pci_add_resource_offset(windows, &pcie->pio, pcie->offset.io);
pci_add_resource_offset(windows, &pcie->mem, pcie->offset.mem);
pci_add_resource(windows, &pcie->busn);
err = devm_request_pci_bus_resources(dev, windows);
if (err < 0)
return err;
err = devm_pci_remap_iospace(dev, &pcie->pio, pcie->io.start);
if (err)
return err;
return 0;
}
static int mtk_pcie_probe(struct platform_device *pdev)
{
struct device *dev = &pdev->dev;
@ -1169,11 +1118,7 @@ static int mtk_pcie_probe(struct platform_device *pdev)
if (err)
return err;
err = mtk_pcie_request_resources(pcie);
if (err)
goto put_resources;
host->busnr = pcie->busn.start;
host->busnr = pcie->busnr;
host->dev.parent = pcie->dev;
host->ops = pcie->soc->ops;
host->map_irq = of_irq_parse_and_map_pci;