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arm64: kernel: acpi: fix ioremap in ACPI parking protocol cpu_postboot
When secondary cpus are booted through the ACPI parking protocol, the booted cpu should check that FW has correctly cleared its mailbox entry point value to make sure the boot process was correctly executed. The entry point check is carried in the cpu_ops->cpu_postboot method, that is executed by secondary cpus when entering the kernel with irqs disabled. The ACPI parking protocol cpu_ops maps/unmaps the mailboxes on the primary CPU to trigger secondary boot in the cpu_ops->cpu_boot method and on secondary processors to carry out FW checks on the booted CPU to verify the boot protocol was successfully executed in the cpu_ops->cpu_postboot method. Therefore, the cpu_ops->cpu_postboot method is forced to ioremap/unmap the mailboxes, which is wrong in that ioremap cannot be safely be carried out with irqs disabled. To fix this issue, this patch reshuffles the code so that the mailboxes are still mapped after the boot processor executes the cpu_ops->cpu_boot method for a given cpu, and the VA at which a mailbox is mapped for a given cpu is stashed in the per-cpu data struct so that secondary cpus can retrieve them in the cpu_ops->cpu_postboot and complete the required FW checks. Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Reported-by: Itaru Kitayama <itaru.kitayama@riken.jp> Tested-by: Loc Ho <lho@apm.com> Tested-by: Itaru Kitayama <itaru.kitayama@riken.jp> Cc: Will Deacon <will.deacon@arm.com> Cc: Hanjun Guo <hanjun.guo@linaro.org> Cc: Loc Ho <lho@apm.com> Cc: Itaru Kitayama <itaru.kitayama@riken.jp> Cc: Sudeep Holla <sudeep.holla@arm.com> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Mark Salter <msalter@redhat.com> Cc: Al Stone <ahs3@redhat.com> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
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@ -21,7 +21,14 @@
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#include <asm/cpu_ops.h>
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struct parking_protocol_mailbox {
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__le32 cpu_id;
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__le32 reserved;
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__le64 entry_point;
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};
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struct cpu_mailbox_entry {
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struct parking_protocol_mailbox __iomem *mailbox;
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phys_addr_t mailbox_addr;
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u8 version;
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u8 gic_cpu_id;
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@ -59,12 +66,6 @@ static int acpi_parking_protocol_cpu_prepare(unsigned int cpu)
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return 0;
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}
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struct parking_protocol_mailbox {
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__le32 cpu_id;
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__le32 reserved;
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__le64 entry_point;
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};
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static int acpi_parking_protocol_cpu_boot(unsigned int cpu)
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{
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struct cpu_mailbox_entry *cpu_entry = &cpu_mailbox_entries[cpu];
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@ -96,6 +97,12 @@ static int acpi_parking_protocol_cpu_boot(unsigned int cpu)
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return -ENXIO;
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}
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/*
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* stash the mailbox address mapping to use it for further FW
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* checks in the postboot method
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*/
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cpu_entry->mailbox = mailbox;
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/*
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* We write the entry point and cpu id as LE regardless of the
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* native endianness of the kernel. Therefore, any boot-loaders
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@ -107,8 +114,6 @@ static int acpi_parking_protocol_cpu_boot(unsigned int cpu)
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arch_send_wakeup_ipi_mask(cpumask_of(cpu));
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iounmap(mailbox);
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return 0;
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}
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@ -116,32 +121,15 @@ static void acpi_parking_protocol_cpu_postboot(void)
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{
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int cpu = smp_processor_id();
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struct cpu_mailbox_entry *cpu_entry = &cpu_mailbox_entries[cpu];
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struct parking_protocol_mailbox __iomem *mailbox;
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struct parking_protocol_mailbox __iomem *mailbox = cpu_entry->mailbox;
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__le64 entry_point;
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/*
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* Map mailbox memory with attribute device nGnRE (ie ioremap -
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* this deviates from the parking protocol specifications since
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* the mailboxes are required to be mapped nGnRnE; the attribute
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* discrepancy is harmless insofar as the protocol specification
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* is concerned).
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* If the mailbox is mistakenly allocated in the linear mapping
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* by FW ioremap will fail since the mapping will be prevented
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* by the kernel (it clashes with the linear mapping attributes
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* specifications).
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*/
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mailbox = ioremap(cpu_entry->mailbox_addr, sizeof(*mailbox));
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if (!mailbox)
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return;
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entry_point = readl_relaxed(&mailbox->entry_point);
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/*
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* Check if firmware has cleared the entry_point as expected
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* by the protocol specification.
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*/
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WARN_ON(entry_point);
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iounmap(mailbox);
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}
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const struct cpu_operations acpi_parking_protocol_ops = {
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