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ARM: dts: qcom: sdx55: fix IPA interconnect definitions

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The first two interconnects defined for IPA on the SDX55 SoC are
really two parts of what should be represented as a single path
between IPA and system memory.

Fix this by combining the "memory-a" and "memory-b" interconnects
into a single "memory" interconnect.

Reported-by: David Heidelberg <david@ixit.cz>
Tested-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Signed-off-by: Alex Elder <elder@linaro.org>
Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
Alex Elder 2021-12-10 16:31:22 -06:00 committed by David S. Miller
parent cec16052d5
commit c0d6316c23
1 changed files with 2 additions and 4 deletions
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6
arch/arm/boot/dts/qcom-sdx55.dtsi
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@ -333,12 +333,10 @@
clocks = <&rpmhcc RPMH_IPA_CLK>;
clock-names = "core";
interconnects = <&system_noc MASTER_IPA &system_noc SLAVE_SNOC_MEM_NOC_GC>,
<&mem_noc MASTER_SNOC_GC_MEM_NOC &mc_virt SLAVE_EBI_CH0>,
interconnects = <&system_noc MASTER_IPA &mc_virt SLAVE_EBI_CH0>,
<&system_noc MASTER_IPA &system_noc SLAVE_OCIMEM>,
<&mem_noc MASTER_AMPSS_M0 &system_noc SLAVE_IPA_CFG>;
interconnect-names = "memory-a",
"memory-b",
interconnect-names = "memory",
"imem",
"config";