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drm/i915/aml: Add new Amber Lake PCI ID

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This new AML PCI ID uses the same gen graphics as Coffe Lake not a
Kaby Lake one like the other AMLs.

So to make it more explicit renaming INTEL_AML_GT2_IDS to
INTEL_AML_KBL_GT2_IDS and naming this id as INTEL_AML_CFL_GT2_IDS.

v2:
- missed add new AML macro to INTEL_CFL_IDS()
- added derivated platform initials to AML macros

Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20180927010650.22731-1-jose.souza@intel.com
This commit is contained in:
José Roberto de Souza 2018-09-26 18:06:50 -07:00 committed by Rodrigo Vivi
parent 0b4bf7ca9b
commit c0c46ca461
2 changed files with 10 additions and 4 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

3
drivers/gpu/drm/i915/i915_pci.c
View File

@ -660,7 +660,7 @@ static const struct pci_device_id pciidlist[] = {
INTEL_KBL_GT2_IDS(&intel_kabylake_gt2_info), INTEL_KBL_GT2_IDS(&intel_kabylake_gt2_info),
INTEL_KBL_GT3_IDS(&intel_kabylake_gt3_info), INTEL_KBL_GT3_IDS(&intel_kabylake_gt3_info),
INTEL_KBL_GT4_IDS(&intel_kabylake_gt3_info), INTEL_KBL_GT4_IDS(&intel_kabylake_gt3_info),
INTEL_AML_GT2_IDS(&intel_kabylake_gt2_info), INTEL_AML_KBL_GT2_IDS(&intel_kabylake_gt2_info),
INTEL_CFL_S_GT1_IDS(&intel_coffeelake_gt1_info), INTEL_CFL_S_GT1_IDS(&intel_coffeelake_gt1_info),
INTEL_CFL_S_GT2_IDS(&intel_coffeelake_gt2_info), INTEL_CFL_S_GT2_IDS(&intel_coffeelake_gt2_info),
INTEL_CFL_H_GT2_IDS(&intel_coffeelake_gt2_info), INTEL_CFL_H_GT2_IDS(&intel_coffeelake_gt2_info),
@ -668,6 +668,7 @@ static const struct pci_device_id pciidlist[] = {
INTEL_CFL_U_GT3_IDS(&intel_coffeelake_gt3_info), INTEL_CFL_U_GT3_IDS(&intel_coffeelake_gt3_info),
INTEL_WHL_U_GT1_IDS(&intel_coffeelake_gt1_info), INTEL_WHL_U_GT1_IDS(&intel_coffeelake_gt1_info),
INTEL_WHL_U_GT2_IDS(&intel_coffeelake_gt2_info), INTEL_WHL_U_GT2_IDS(&intel_coffeelake_gt2_info),
INTEL_AML_CFL_GT2_IDS(&intel_coffeelake_gt2_info),
INTEL_WHL_U_GT3_IDS(&intel_coffeelake_gt3_info), INTEL_WHL_U_GT3_IDS(&intel_coffeelake_gt3_info),
INTEL_CNL_IDS(&intel_cannonlake_info), INTEL_CNL_IDS(&intel_cannonlake_info),
INTEL_ICL_11_IDS(&intel_icelake_11_info), INTEL_ICL_11_IDS(&intel_icelake_11_info),

11
include/drm/i915_pciids.h
View File

@ -365,16 +365,20 @@
INTEL_VGA_DEVICE(0x593B, info) /* Halo GT4 */ INTEL_VGA_DEVICE(0x593B, info) /* Halo GT4 */
/* AML/KBL Y GT2 */ /* AML/KBL Y GT2 */
#define INTEL_AML_GT2_IDS(info) \ #define INTEL_AML_KBL_GT2_IDS(info) \
INTEL_VGA_DEVICE(0x591C, info), /* ULX GT2 */ \ INTEL_VGA_DEVICE(0x591C, info), /* ULX GT2 */ \
INTEL_VGA_DEVICE(0x87C0, info) /* ULX GT2 */ INTEL_VGA_DEVICE(0x87C0, info) /* ULX GT2 */
/* AML/CFL Y GT2 */
#define INTEL_AML_CFL_GT2_IDS(info) \
INTEL_VGA_DEVICE(0x87CA, info)
#define INTEL_KBL_IDS(info) \ #define INTEL_KBL_IDS(info) \
INTEL_KBL_GT1_IDS(info), \ INTEL_KBL_GT1_IDS(info), \
INTEL_KBL_GT2_IDS(info), \ INTEL_KBL_GT2_IDS(info), \
INTEL_KBL_GT3_IDS(info), \ INTEL_KBL_GT3_IDS(info), \
INTEL_KBL_GT4_IDS(info), \ INTEL_KBL_GT4_IDS(info), \
INTEL_AML_GT2_IDS(info) INTEL_AML_KBL_GT2_IDS(info)
/* CFL S */ /* CFL S */
#define INTEL_CFL_S_GT1_IDS(info) \ #define INTEL_CFL_S_GT1_IDS(info) \
@ -427,7 +431,8 @@
INTEL_CFL_U_GT3_IDS(info), \ INTEL_CFL_U_GT3_IDS(info), \
INTEL_WHL_U_GT1_IDS(info), \ INTEL_WHL_U_GT1_IDS(info), \
INTEL_WHL_U_GT2_IDS(info), \ INTEL_WHL_U_GT2_IDS(info), \
INTEL_WHL_U_GT3_IDS(info) INTEL_WHL_U_GT3_IDS(info), \
INTEL_AML_CFL_GT2_IDS(info)
/* CNL */ /* CNL */
#define INTEL_CNL_IDS(info) \ #define INTEL_CNL_IDS(info) \