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[IA64] Avoid .spillpsp directive in handcoded assembly
Some time ago, GAS was fixed to bring the .spillpsp directive in line with the Intel assembler manual (there was some disagreement as to whether or not there is a built-in 16-byte offset). Unfortunately, there are two places in the kernel where this directive is used in handwritten assembly files and those of course relied on the "buggy" behavior. As a result, when using a "fixed" assembler, the kernel picks up the UNaT bits from the wrong place (off by 16) and randomly sets NaT bits on the scratch registers. This can be noticed easily by looking at a coredump and finding various scratch registers with unexpected NaT values. The patch below fixes this by using the .spillsp directive instead, which works correctly no matter what assembler is in use. Signed-off-by: David Mosberger-Tang <davidm@hpl.hp.com> Signed-off-by: Tony Luck <tony.luck@intel.com>
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@ -1182,7 +1182,7 @@ ENTRY(notify_resume_user)
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;;
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(pNonSys) mov out2=0 // out2==0 => not a syscall
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.fframe 16
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.spillpsp ar.unat, 16 // (note that offset is relative to psp+0x10!)
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.spillsp ar.unat, 16
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st8 [sp]=r9,-16 // allocate space for ar.unat and save it
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st8 [out1]=loc1,-8 // save ar.pfs, out1=&sigscratch
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.body
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@ -1208,7 +1208,7 @@ GLOBAL_ENTRY(sys_rt_sigsuspend)
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adds out2=8,sp // out2=&sigscratch->ar_pfs
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;;
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.fframe 16
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.spillpsp ar.unat, 16 // (note that offset is relative to psp+0x10!)
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.spillsp ar.unat, 16
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st8 [sp]=r9,-16 // allocate space for ar.unat and save it
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st8 [out2]=loc1,-8 // save ar.pfs, out2=&sigscratch
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.body
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