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net: stmmac: fix dma physical address of descriptor when display ring
Driver uses dma_alloc_coherent to allocate dma memory for descriptors, dma_alloc_coherent will return both the virtual address and physical address. AFAIK, virt_to_phys could not convert virtual address to physical address, for which memory is allocated by dma_alloc_coherent. dwmac4_display_ring() function is broken for various descriptor, it only support normal descriptor(struct dma_desc) now, this patch also extends to support all descriptor types. Signed-off-by: Joakim Zhang <qiangqing.zhang@nxp.com> Signed-off-by: Jakub Kicinski <kuba@kernel.org>
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c511819d13
commit
bfaf91ca84
@ -402,19 +402,53 @@ static void dwmac4_rd_set_tx_ic(struct dma_desc *p)
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p->des2 |= cpu_to_le32(TDES2_INTERRUPT_ON_COMPLETION);
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}
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static void dwmac4_display_ring(void *head, unsigned int size, bool rx)
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static void dwmac4_display_ring(void *head, unsigned int size, bool rx,
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dma_addr_t dma_rx_phy, unsigned int desc_size)
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{
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struct dma_desc *p = (struct dma_desc *)head;
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dma_addr_t dma_addr;
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int i;
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pr_info("%s descriptor ring:\n", rx ? "RX" : "TX");
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for (i = 0; i < size; i++) {
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pr_info("%03d [0x%x]: 0x%x 0x%x 0x%x 0x%x\n",
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i, (unsigned int)virt_to_phys(p),
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le32_to_cpu(p->des0), le32_to_cpu(p->des1),
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le32_to_cpu(p->des2), le32_to_cpu(p->des3));
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p++;
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if (desc_size == sizeof(struct dma_desc)) {
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struct dma_desc *p = (struct dma_desc *)head;
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for (i = 0; i < size; i++) {
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dma_addr = dma_rx_phy + i * sizeof(*p);
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pr_info("%03d [%pad]: 0x%x 0x%x 0x%x 0x%x\n",
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i, &dma_addr,
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le32_to_cpu(p->des0), le32_to_cpu(p->des1),
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le32_to_cpu(p->des2), le32_to_cpu(p->des3));
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p++;
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}
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} else if (desc_size == sizeof(struct dma_extended_desc)) {
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struct dma_extended_desc *extp = (struct dma_extended_desc *)head;
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for (i = 0; i < size; i++) {
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dma_addr = dma_rx_phy + i * sizeof(*extp);
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pr_info("%03d [%pad]: 0x%x 0x%x 0x%x 0x%x 0x%x 0x%x 0x%x 0x%x\n",
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i, &dma_addr,
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le32_to_cpu(extp->basic.des0), le32_to_cpu(extp->basic.des1),
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le32_to_cpu(extp->basic.des2), le32_to_cpu(extp->basic.des3),
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le32_to_cpu(extp->des4), le32_to_cpu(extp->des5),
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le32_to_cpu(extp->des6), le32_to_cpu(extp->des7));
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extp++;
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}
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} else if (desc_size == sizeof(struct dma_edesc)) {
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struct dma_edesc *ep = (struct dma_edesc *)head;
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for (i = 0; i < size; i++) {
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dma_addr = dma_rx_phy + i * sizeof(*ep);
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pr_info("%03d [%pad]: 0x%x 0x%x 0x%x 0x%x 0x%x 0x%x 0x%x 0x%x\n",
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i, &dma_addr,
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le32_to_cpu(ep->des4), le32_to_cpu(ep->des5),
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le32_to_cpu(ep->des6), le32_to_cpu(ep->des7),
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le32_to_cpu(ep->basic.des0), le32_to_cpu(ep->basic.des1),
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le32_to_cpu(ep->basic.des2), le32_to_cpu(ep->basic.des3));
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ep++;
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}
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} else {
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pr_err("unsupported descriptor!");
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}
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}
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@ -417,19 +417,22 @@ static int enh_desc_get_rx_timestamp_status(void *desc, void *next_desc,
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}
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}
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static void enh_desc_display_ring(void *head, unsigned int size, bool rx)
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static void enh_desc_display_ring(void *head, unsigned int size, bool rx,
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dma_addr_t dma_rx_phy, unsigned int desc_size)
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{
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struct dma_extended_desc *ep = (struct dma_extended_desc *)head;
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dma_addr_t dma_addr;
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int i;
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pr_info("Extended %s descriptor ring:\n", rx ? "RX" : "TX");
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for (i = 0; i < size; i++) {
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u64 x;
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dma_addr = dma_rx_phy + i * sizeof(*ep);
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x = *(u64 *)ep;
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pr_info("%03d [0x%x]: 0x%x 0x%x 0x%x 0x%x\n",
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i, (unsigned int)virt_to_phys(ep),
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pr_info("%03d [%pad]: 0x%x 0x%x 0x%x 0x%x\n",
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i, &dma_addr,
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(unsigned int)x, (unsigned int)(x >> 32),
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ep->basic.des2, ep->basic.des3);
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ep++;
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@ -78,7 +78,8 @@ struct stmmac_desc_ops {
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/* get rx timestamp status */
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int (*get_rx_timestamp_status)(void *desc, void *next_desc, u32 ats);
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/* Display ring */
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void (*display_ring)(void *head, unsigned int size, bool rx);
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void (*display_ring)(void *head, unsigned int size, bool rx,
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dma_addr_t dma_rx_phy, unsigned int desc_size);
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/* set MSS via context descriptor */
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void (*set_mss)(struct dma_desc *p, unsigned int mss);
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/* get descriptor skbuff address */
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@ -269,19 +269,22 @@ static int ndesc_get_rx_timestamp_status(void *desc, void *next_desc, u32 ats)
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return 1;
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}
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static void ndesc_display_ring(void *head, unsigned int size, bool rx)
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static void ndesc_display_ring(void *head, unsigned int size, bool rx,
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dma_addr_t dma_rx_phy, unsigned int desc_size)
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{
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struct dma_desc *p = (struct dma_desc *)head;
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dma_addr_t dma_addr;
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int i;
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pr_info("%s descriptor ring:\n", rx ? "RX" : "TX");
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for (i = 0; i < size; i++) {
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u64 x;
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dma_addr = dma_rx_phy + i * sizeof(*p);
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x = *(u64 *)p;
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pr_info("%03d [0x%x]: 0x%x 0x%x 0x%x 0x%x",
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i, (unsigned int)virt_to_phys(p),
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pr_info("%03d [%pad]: 0x%x 0x%x 0x%x 0x%x",
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i, &dma_addr,
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(unsigned int)x, (unsigned int)(x >> 32),
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p->des2, p->des3);
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p++;
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@ -1133,6 +1133,7 @@ static int stmmac_phy_setup(struct stmmac_priv *priv)
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static void stmmac_display_rx_rings(struct stmmac_priv *priv)
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{
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u32 rx_cnt = priv->plat->rx_queues_to_use;
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unsigned int desc_size;
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void *head_rx;
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u32 queue;
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@ -1142,19 +1143,24 @@ static void stmmac_display_rx_rings(struct stmmac_priv *priv)
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pr_info("\tRX Queue %u rings\n", queue);
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if (priv->extend_desc)
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if (priv->extend_desc) {
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head_rx = (void *)rx_q->dma_erx;
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else
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desc_size = sizeof(struct dma_extended_desc);
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} else {
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head_rx = (void *)rx_q->dma_rx;
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desc_size = sizeof(struct dma_desc);
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}
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/* Display RX ring */
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stmmac_display_ring(priv, head_rx, priv->dma_rx_size, true);
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stmmac_display_ring(priv, head_rx, priv->dma_rx_size, true,
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rx_q->dma_rx_phy, desc_size);
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}
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}
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static void stmmac_display_tx_rings(struct stmmac_priv *priv)
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{
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u32 tx_cnt = priv->plat->tx_queues_to_use;
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unsigned int desc_size;
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void *head_tx;
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u32 queue;
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@ -1164,14 +1170,19 @@ static void stmmac_display_tx_rings(struct stmmac_priv *priv)
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pr_info("\tTX Queue %d rings\n", queue);
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if (priv->extend_desc)
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if (priv->extend_desc) {
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head_tx = (void *)tx_q->dma_etx;
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else if (tx_q->tbs & STMMAC_TBS_AVAIL)
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desc_size = sizeof(struct dma_extended_desc);
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} else if (tx_q->tbs & STMMAC_TBS_AVAIL) {
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head_tx = (void *)tx_q->dma_entx;
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else
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desc_size = sizeof(struct dma_edesc);
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} else {
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head_tx = (void *)tx_q->dma_tx;
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desc_size = sizeof(struct dma_desc);
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}
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stmmac_display_ring(priv, head_tx, priv->dma_tx_size, false);
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stmmac_display_ring(priv, head_tx, priv->dma_tx_size, false,
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tx_q->dma_tx_phy, desc_size);
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}
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}
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@ -3736,18 +3747,23 @@ static int stmmac_rx(struct stmmac_priv *priv, int limit, u32 queue)
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unsigned int count = 0, error = 0, len = 0;
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int status = 0, coe = priv->hw->rx_csum;
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unsigned int next_entry = rx_q->cur_rx;
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unsigned int desc_size;
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struct sk_buff *skb = NULL;
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if (netif_msg_rx_status(priv)) {
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void *rx_head;
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netdev_dbg(priv->dev, "%s: descriptor ring:\n", __func__);
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if (priv->extend_desc)
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if (priv->extend_desc) {
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rx_head = (void *)rx_q->dma_erx;
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else
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desc_size = sizeof(struct dma_extended_desc);
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} else {
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rx_head = (void *)rx_q->dma_rx;
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desc_size = sizeof(struct dma_desc);
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}
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stmmac_display_ring(priv, rx_head, priv->dma_rx_size, true);
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stmmac_display_ring(priv, rx_head, priv->dma_rx_size, true,
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rx_q->dma_rx_phy, desc_size);
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}
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while (count < limit) {
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unsigned int buf1_len = 0, buf2_len = 0;
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@ -4315,24 +4331,27 @@ static int stmmac_set_mac_address(struct net_device *ndev, void *addr)
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static struct dentry *stmmac_fs_dir;
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static void sysfs_display_ring(void *head, int size, int extend_desc,
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struct seq_file *seq)
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struct seq_file *seq, dma_addr_t dma_phy_addr)
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{
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int i;
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struct dma_extended_desc *ep = (struct dma_extended_desc *)head;
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struct dma_desc *p = (struct dma_desc *)head;
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dma_addr_t dma_addr;
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for (i = 0; i < size; i++) {
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if (extend_desc) {
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seq_printf(seq, "%d [0x%x]: 0x%x 0x%x 0x%x 0x%x\n",
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i, (unsigned int)virt_to_phys(ep),
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dma_addr = dma_phy_addr + i * sizeof(*ep);
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seq_printf(seq, "%d [%pad]: 0x%x 0x%x 0x%x 0x%x\n",
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i, &dma_addr,
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le32_to_cpu(ep->basic.des0),
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le32_to_cpu(ep->basic.des1),
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le32_to_cpu(ep->basic.des2),
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le32_to_cpu(ep->basic.des3));
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ep++;
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} else {
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seq_printf(seq, "%d [0x%x]: 0x%x 0x%x 0x%x 0x%x\n",
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i, (unsigned int)virt_to_phys(p),
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dma_addr = dma_phy_addr + i * sizeof(*p);
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seq_printf(seq, "%d [%pad]: 0x%x 0x%x 0x%x 0x%x\n",
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i, &dma_addr,
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le32_to_cpu(p->des0), le32_to_cpu(p->des1),
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le32_to_cpu(p->des2), le32_to_cpu(p->des3));
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p++;
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@ -4360,11 +4379,11 @@ static int stmmac_rings_status_show(struct seq_file *seq, void *v)
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if (priv->extend_desc) {
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seq_printf(seq, "Extended descriptor ring:\n");
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sysfs_display_ring((void *)rx_q->dma_erx,
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priv->dma_rx_size, 1, seq);
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priv->dma_rx_size, 1, seq, rx_q->dma_rx_phy);
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} else {
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seq_printf(seq, "Descriptor ring:\n");
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sysfs_display_ring((void *)rx_q->dma_rx,
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priv->dma_rx_size, 0, seq);
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priv->dma_rx_size, 0, seq, rx_q->dma_rx_phy);
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}
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}
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@ -4376,11 +4395,11 @@ static int stmmac_rings_status_show(struct seq_file *seq, void *v)
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if (priv->extend_desc) {
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seq_printf(seq, "Extended descriptor ring:\n");
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sysfs_display_ring((void *)tx_q->dma_etx,
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priv->dma_tx_size, 1, seq);
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priv->dma_tx_size, 1, seq, tx_q->dma_tx_phy);
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} else if (!(tx_q->tbs & STMMAC_TBS_AVAIL)) {
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seq_printf(seq, "Descriptor ring:\n");
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sysfs_display_ring((void *)tx_q->dma_tx,
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priv->dma_tx_size, 0, seq);
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priv->dma_tx_size, 0, seq, tx_q->dma_tx_phy);
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}
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}
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