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pinctrl: mvebu: armada-370: align VDD cpu-pd pin naming with datasheet
For consistency with the datasheet, this commit renames the VDD function of the MPP4 pin. While this changes the DT compatibility, it is not considered to be a problem since this pin is unlikely to be used for anything but debugging purposes. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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@ -17,7 +17,7 @@ mpp0 0 gpio, uart0(rxd)
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mpp1 1 gpo, uart0(txd)
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mpp2 2 gpio, i2c0(sck), uart0(txd)
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mpp3 3 gpio, i2c0(sda), uart0(rxd)
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mpp4 4 gpio, cpu_pd(vdd)
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mpp4 4 gpio, vdd(cpu-pd)
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mpp5 5 gpo, ge0(txclkout), uart1(txd), spi1(clk), audio(mclk)
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mpp6 6 gpio, ge0(txd0), sata0(prsnt), tdm(rst), audio(sdo)
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mpp7 7 gpo, ge0(txd1), tdm(dtx), audio(lrclk)
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@ -52,7 +52,7 @@ static struct mvebu_mpp_mode mv88f6710_mpp_modes[] = {
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MPP_FUNCTION(0x2, "uart0", "rxd")),
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MPP_MODE(4,
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MPP_FUNCTION(0x0, "gpio", NULL),
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MPP_FUNCTION(0x1, "cpu_pd", "vdd")),
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MPP_FUNCTION(0x1, "vdd", "cpu-pd")),
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MPP_MODE(5,
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MPP_FUNCTION(0x0, "gpo", NULL),
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MPP_FUNCTION(0x1, "ge0", "txclkout"),
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