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Amlogic ARM DT changes for v6.13:

Browse Source 
- DT fixes to pass bindings chedk, including:
  - fixing nodes names
  - dropping meson6 ATV1200 board
  - add missing properties
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Merge tag 'amlogic-arm-dt-for-v6.13' of https://git.kernel.org/pub/scm/linux/kernel/git/amlogic/linux into soc/dt

Amlogic ARM DT changes for v6.13:
- DT fixes to pass bindings chedk, including:
 - fixing nodes names
 - dropping meson6 ATV1200 board
 - add missing properties

* tag 'amlogic-arm-dt-for-v6.13' of https://git.kernel.org/pub/scm/linux/kernel/git/amlogic/linux:
  ARM: dts: amlogic: meson8/8b: remove invalid pinctrl reg
  ARM: dts: amlogic: meson8b-ec100: add missing gpio-line-names entry
  ARM: dts: amlogic: meson8b-ec100: add missing clocks property in sound card
  ARM: dts: amlogic: meson8-minix-neo-x8: fix invalid pnictrl-names
  ARM: dts: amlogic: add missing phy-mode in ethmac node
  ARM: dts: amlogic: meson8: use correct pinctrl bank node name
  ARM: dts: amlogic: fix /memory node name
  ARM: dts: amlogic: meson8b-odroidc1: fix invalid reset-gpio
  ARM: dts: amlogic: meson6: remove support for ATV1200 board
  ARM: dts: amlogic: meson8: fix ao_arc_sram node name
  ARM: dts: amlogic: meson8: fix soc thermal-zone node name
  ARM: dts: amlogic: meson6: fix clk81 node name

Link: https://lore.kernel.org/r/ffaa3755-8c5d-4fc3-86bf-9129d3889bff@linaro.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
Arnd Bergmann 2024-11-12 22:50:58 +01:00
commit bf7626089a
10 changed files with 43 additions and 150 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
arch/arm/boot/dts/amlogic/Makefile
View File

@ -1,6 +1,4 @@
# SPDX-License-Identifier: GPL-2.0
dtb-$(CONFIG_MACH_MESON6) += \
meson6-atv1200.dtb
dtb-$(CONFIG_MACH_MESON8) += \
meson8-minix-neo-x8.dtb \
meson8b-ec100.dtb \

33
arch/arm/boot/dts/amlogic/meson6-atv1200.dts
View File

@ -1,33 +0,0 @@
// SPDX-License-Identifier: GPL-2.0 OR MIT
/*
* Copyright 2014 Carlo Caione <carlo@caione.org>
*/
/dts-v1/;
#include "meson6.dtsi"
/ {
model = "Geniatech ATV1200";
compatible = "geniatech,atv1200", "amlogic,meson6";
aliases {
serial0 = &uart_AO;
};
chosen {
stdout-path = "serial0:115200n8";
};
memory {
device_type = "memory";
reg = <0x40000000 0x80000000>;
};
};
&uart_AO {
status = "okay";
};
&ethmac {
status = "okay";
};

73
arch/arm/boot/dts/amlogic/meson6.dtsi
View File

@ -1,73 +0,0 @@
// SPDX-License-Identifier: GPL-2.0 OR MIT
/*
* Copyright 2014 Carlo Caione <carlo@caione.org>
*/
#include "meson.dtsi"
/ {
model = "Amlogic Meson6 SoC";
compatible = "amlogic,meson6";
cpus {
#address-cells = <1>;
#size-cells = <0>;
cpu@200 {
device_type = "cpu";
compatible = "arm,cortex-a9";
next-level-cache = <&L2>;
reg = <0x200>;
};
cpu@201 {
device_type = "cpu";
compatible = "arm,cortex-a9";
next-level-cache = <&L2>;
reg = <0x201>;
};
};
apb2: bus@d0000000 {
compatible = "simple-bus";
reg = <0xd0000000 0x40000>;
#address-cells = <1>;
#size-cells = <1>;
ranges = <0x0 0xd0000000 0x40000>;
};
clk81: clk@0 {
#clock-cells = <0>;
compatible = "fixed-clock";
clock-frequency = <200000000>;
};
}; /* end of / */
&efuse {
status = "disabled";
};
&timer_abcde {
clocks = <&xtal>, <&clk81>;
clock-names = "xtal", "pclk";
};
&uart_AO {
clocks = <&xtal>, <&clk81>, <&clk81>;
clock-names = "xtal", "pclk", "baud";
};
&uart_A {
clocks = <&xtal>, <&clk81>, <&clk81>;
clock-names = "xtal", "pclk", "baud";
};
&uart_B {
clocks = <&xtal>, <&clk81>, <&clk81>;
clock-names = "xtal", "pclk", "baud";
};
&uart_C {
clocks = <&xtal>, <&clk81>, <&clk81>;
clock-names = "xtal", "pclk", "baud";
};

5
arch/arm/boot/dts/amlogic/meson8-minix-neo-x8.dts
View File

@ -19,7 +19,7 @@
stdout-path = "serial0:115200n8";
};
memory {
memory@40000000 {
device_type = "memory";
reg = <0x40000000 0x80000000>;
};
@ -93,5 +93,6 @@
&ethmac {
status = "okay";
pinctrl-0 = <&eth_pins>;
pnictrl-names = "default";
pinctrl-names = "default";
phy-mode = "rmii";
};

32
arch/arm/boot/dts/amlogic/meson8.dtsi
View File

@ -196,7 +196,7 @@
};
thermal-zones {
soc {
soc-thermal {
polling-delay-passive = <250>; /* milliseconds */
polling-delay = <1000>; /* milliseconds */
thermal-sensors = <&thermal_sensor>;
@ -346,17 +346,16 @@
reg = <0xe0 0x18>;
};
pinctrl_aobus: pinctrl@84 {
pinctrl_aobus: pinctrl@14 {
compatible = "amlogic,meson8-aobus-pinctrl";
reg = <0x84 0xc>;
#address-cells = <1>;
#size-cells = <1>;
ranges;
ranges = <0x0 0x14 0x1c>;
gpio_ao: ao-bank@14 {
reg = <0x14 0x4>,
<0x2c 0x4>,
<0x24 0x8>;
gpio_ao: bank@0 {
reg = <0x0 0x4>,
<0x18 0x4>,
<0x10 0x8>;
reg-names = "mux", "pull", "gpio";
gpio-controller;
#gpio-cells = <2>;
@ -461,18 +460,17 @@
reg = <0x8758 0x1c>;
};
pinctrl_cbus: pinctrl@9880 {
pinctrl_cbus: pinctrl@8030 {
compatible = "amlogic,meson8-cbus-pinctrl";
reg = <0x9880 0x10>;
#address-cells = <1>;
#size-cells = <1>;
ranges;
ranges = <0x0 0x8030 0x108>;
gpio: banks@80b0 {
reg = <0x80b0 0x28>,
<0x80e8 0x18>,
<0x8120 0x18>,
<0x8030 0x30>;
gpio: bank@80 {
reg = <0x80 0x28>,
<0xb8 0x18>,
<0xf0 0x18>,
<0x00 0x30>;
reg-names = "mux", "pull", "pull-enable", "gpio";
gpio-controller;
#gpio-cells = <2>;
@ -589,7 +587,7 @@
};
&ahb_sram {
ao_arc_sram: ao-arc-sram@0 {
ao_arc_sram: aoarc-sram@0 {
compatible = "amlogic,meson8-ao-arc-sram";
reg = <0x0 0x8000>;
pool;

8
arch/arm/boot/dts/amlogic/meson8b-ec100.dts
View File

@ -22,7 +22,7 @@
stdout-path = "serial0:115200n8";
};
memory {
memory@40000000 {
device_type = "memory";
reg = <0x40000000 0x40000000>;
};
@ -98,6 +98,10 @@
compatible = "amlogic,gx-sound-card";
model = "M8B-EC100";
clocks = <&clkc CLKID_MPLL0>,
<&clkc CLKID_MPLL1>,
<&clkc CLKID_MPLL2>;
assigned-clocks = <&clkc CLKID_MPLL0>,
<&clkc CLKID_MPLL1>,
<&clkc CLKID_MPLL2>;
@ -427,7 +431,7 @@
"NAND_CS1 (EMMC)", "NAND_CS2 iNAND_RS1 (EMMC)",
"NAND_nR/B iNAND_CMD (EMMC)", "NAND_ALE (EMMC)",
"NAND_CLE (EMMC)", "nRE_S1 NAND_nRE (EMMC)",
"nWE_S1 NAND_nWE (EMMC)", "", "", "SPI_CS",
"nWE_S1 NAND_nWE (EMMC)", "", "", "", "SPI_CS",
/* Bank DIF */
"RMII_RXD1", "RMII_RXD0", "RMII_CRS_DV",
"RMII_50M_IN", "GPIODIF_4", "GPIODIF_5",

2
arch/arm/boot/dts/amlogic/meson8b-mxq.dts
View File

@ -22,7 +22,7 @@
stdout-path = "serial0:115200n8";
};
memory {
memory@40000000 {
device_type = "memory";
reg = <0x40000000 0x40000000>;
};

4
arch/arm/boot/dts/amlogic/meson8b-odroidc1.dts
View File

@ -22,7 +22,7 @@
stdout-path = "serial0:115200n8";
};
memory {
memory@40000000 {
device_type = "memory";
reg = <0x40000000 0x40000000>;
};
@ -378,6 +378,6 @@
compatible = "usb5e3,610";
reg = <1>;
vdd-supply = <&p5v0>;
reset-gpio = <&gpio_ao GPIOAO_4 GPIO_ACTIVE_LOW>;
reset-gpios = <&gpio_ao GPIOAO_4 GPIO_ACTIVE_LOW>;
};
};

32
arch/arm/boot/dts/amlogic/meson8b.dtsi
View File

@ -173,7 +173,7 @@
};
thermal-zones {
soc {
soc-thermal {
polling-delay-passive = <250>; /* milliseconds */
polling-delay = <1000>; /* milliseconds */
thermal-sensors = <&thermal_sensor>;
@ -308,17 +308,16 @@
reg = <0xe0 0x18>;
};
pinctrl_aobus: pinctrl@84 {
pinctrl_aobus: pinctrl@14 {
compatible = "amlogic,meson8b-aobus-pinctrl";
reg = <0x84 0xc>;
#address-cells = <1>;
#size-cells = <1>;
ranges;
ranges = <0x0 0x14 0x1c>;
gpio_ao: ao-bank@14 {
reg = <0x14 0x4>,
<0x2c 0x4>,
<0x24 0x8>;
gpio_ao: bank@0 {
reg = <0x0 0x4>,
<0x18 0x4>,
<0x10 0x8>;
reg-names = "mux", "pull", "gpio";
gpio-controller;
#gpio-cells = <2>;
@ -415,18 +414,17 @@
reg = <0x8758 0x1c>;
};
pinctrl_cbus: pinctrl@9880 {
pinctrl_cbus: pinctrl@8030 {
compatible = "amlogic,meson8b-cbus-pinctrl";
reg = <0x9880 0x10>;
#address-cells = <1>;
#size-cells = <1>;
ranges;
ranges = <0x0 0x8030 0x108>;
gpio: banks@80b0 {
reg = <0x80b0 0x28>,
<0x80e8 0x18>,
<0x8120 0x18>,
<0x8030 0x38>;
gpio: bank@80 {
reg = <0x80 0x28>,
<0xb8 0x18>,
<0xf0 0x18>,
<0x00 0x38>;
reg-names = "mux", "pull", "pull-enable", "gpio";
gpio-controller;
#gpio-cells = <2>;
@ -535,7 +533,7 @@
};
&ahb_sram {
ao_arc_sram: ao-arc-sram@0 {
ao_arc_sram: aoarc-sram@0 {
compatible = "amlogic,meson8b-ao-arc-sram";
reg = <0x0 0x8000>;
pool;

2
arch/arm/boot/dts/amlogic/meson8m2-mxiii-plus.dts
View File

@ -26,7 +26,7 @@
stdout-path = "serial0:115200n8";
};
memory {
memory@40000000 {
device_type = "memory";
reg = <0x40000000 0x80000000>;
};