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Renesas ARM Based SoC soc-cleanup Updates for v3.16
r8a7791 (R-Car H2) SoC and its Koelsch board and, r8a7740 (R-Mobile A1) SoC and its Armadillo800eva board * Set CPU clock frequency from OF nodes -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.14 (GNU/Linux) iQIcBAABAgAGBQJTdV6AAAoJENfPZGlqN0++Q70QAI4sQTJdB6WRbmQ5DtAVQZ4n lJcFNoL4HkH52b9vC5GrHAZmtvJl4s5n53qAi88gsdkznfHmsDcFdbG7GdOo4ij0 JHE6aPHEhpOMjLJaYwN6Sr+X3sIQFktjRKzREFuUVYrVnFiVWSLksnmBF9EmiRma IdWXSZhHAENnPHMC3IuYbfIRtRKXyNLvpW3SloMdtE4C1gc0PWA3yG2a28gFQfI1 aQZ3z4m5eocxABpUClP1PVMVFWSr8dqfK9PIriGGPJBuLGsKCmqWiWLX3rXNxK/S VaU3UYOscXVV33SAI3VRGtUi7Eh3PfPXmlKSsQDBjZKfnhwlwIztekzuZcq+vaK+ FLYFRh8DlpxqIA2fl2B8D6C5kpsgTbWKGUhEKi9UgXFqM1ZEm3SxyYFaN8NckyQP t7ZH3ZKNfjJrPk6bN5JUC7eepRiNtc7YOz5d1I4HBQkrFpIFlc+JHTODX0R6Ao4+ 9mSraY+5Boyrw9aOTDH2wY08M01eYipN99zeScPZ/rNXEx+McwWHXBOhemrkKhbr 6cWHFeJoR7V1UuibV9ifLlvsBl+j/IGv0B8ZjgwaYN+KLxI/OWAigUfNvkvP3zp8 xMLgyvqTHh8gFU24xdPbhZ1DJNM5rQSOKd4AIGqiPS4ZGHZ4Ash7BtS42cA43RiG TWoNYzKKNvcGDP67HmyI =pLjF -----END PGP SIGNATURE----- Merge tag 'renesas-soc-cleanup-for-v3.16' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/soc Merge "Renesas ARM Based SoC soc-cleanup Updates for v3.16" from Simon Horman: r8a7791 (R-Car H2) SoC and its Koelsch board and, r8a7740 (R-Mobile A1) SoC and its Armadillo800eva board * Set CPU clock frequency from OF nodes * tag 'renesas-soc-cleanup-for-v3.16' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: ARM: shmobile: Set clock frequency in HZ from OF nodes ARM: shmobile: Use shmobile_init_late() on r8a7740 ARM: shmobile: Remove unused r8a7791_init_early() ARM: shmobile: Use r8a7791 DT CPU Frequency for Koelsch ARM: shmobile: Use r8a7791 DT CPU Frequency in common case ARM: shmobile: Remove unused r8a7740_init_delay() ARM: shmobile: Use r8a7740 DT CPU Frequency for Armadillo DT Ref ARM: shmobile: Use r8a7740 DT CPU Frequency in common case ARM: shmobile: Add r8a7740 Maximum CPU Frequency to DTS Signed-off-by: Olof Johansson <olof@lixom.net>
This commit is contained in:
commit
bf4348e622
@ -22,6 +22,7 @@
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compatible = "arm,cortex-a9";
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device_type = "cpu";
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reg = <0x0>;
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clock-frequency = <800000000>;
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};
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};
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@ -187,7 +187,7 @@ static const char *eva_boards_compat_dt[] __initdata = {
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DT_MACHINE_START(ARMADILLO800EVA_DT, "armadillo800eva-reference")
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.map_io = r8a7740_map_io,
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.init_early = r8a7740_init_delay,
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.init_early = shmobile_init_delay,
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.init_irq = r8a7740_init_irq_of,
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.init_machine = eva_init,
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.init_late = shmobile_init_late,
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@ -139,7 +139,7 @@ static const char * const koelsch_boards_compat_dt[] __initconst = {
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DT_MACHINE_START(KOELSCH_DT, "koelsch")
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.smp = smp_ops(r8a7791_smp_ops),
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.init_early = r8a7791_init_early,
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.init_early = shmobile_init_delay,
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.init_time = rcar_gen2_timer_init,
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.init_machine = koelsch_add_standard_devices,
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.init_late = shmobile_init_late,
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@ -522,7 +522,7 @@ static const char * const koelsch_boards_compat_dt[] __initconst = {
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DT_MACHINE_START(KOELSCH_DT, "koelsch")
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.smp = smp_ops(r8a7791_smp_ops),
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.init_early = r8a7791_init_early,
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.init_early = shmobile_init_delay,
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.init_time = rcar_gen2_timer_init,
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.init_machine = koelsch_init,
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.init_late = shmobile_init_late,
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@ -47,7 +47,6 @@ enum {
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};
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extern void r8a7740_meram_workaround(void);
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extern void r8a7740_init_delay(void);
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extern void r8a7740_init_irq_of(void);
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extern void r8a7740_map_io(void);
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extern void r8a7740_add_early_devices(void);
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@ -5,7 +5,6 @@ void r8a7791_add_standard_devices(void);
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void r8a7791_add_dt_devices(void);
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void r8a7791_clock_init(void);
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void r8a7791_pinmux_init(void);
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void r8a7791_init_early(void);
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extern struct smp_operations r8a7791_smp_ops;
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#endif /* __ASM_R8A7791_H__ */
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@ -887,11 +887,6 @@ void __init r8a7740_add_standard_devices_dt(void)
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of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
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}
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void __init r8a7740_init_delay(void)
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{
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shmobile_setup_delay(800, 1, 3); /* Cortex-A9 @ 800MHz */
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};
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void __init r8a7740_init_irq_of(void)
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{
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void __iomem *intc_prio_base = ioremap_nocache(0xe6900010, 0x10);
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@ -935,9 +930,10 @@ static const char *r8a7740_boards_compat_dt[] __initdata = {
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DT_MACHINE_START(R8A7740_DT, "Generic R8A7740 (Flattened Device Tree)")
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.map_io = r8a7740_map_io,
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.init_early = r8a7740_init_delay,
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.init_early = shmobile_init_delay,
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.init_irq = r8a7740_init_irq_of,
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.init_machine = r8a7740_generic_init,
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.init_late = shmobile_init_late,
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.dt_compat = r8a7740_boards_compat_dt,
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MACHINE_END
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@ -210,13 +210,6 @@ void __init r8a7791_add_standard_devices(void)
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r8a7791_register_thermal();
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}
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void __init r8a7791_init_early(void)
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{
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#ifndef CONFIG_ARM_ARCH_TIMER
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shmobile_setup_delay(1500, 2, 4); /* Cortex-A15 @ 1500MHz */
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#endif
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}
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#ifdef CONFIG_USE_OF
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static const char *r8a7791_boards_compat_dt[] __initdata = {
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"renesas,r8a7791",
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@ -225,7 +218,7 @@ static const char *r8a7791_boards_compat_dt[] __initdata = {
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DT_MACHINE_START(R8A7791_DT, "Generic R8A7791 (Flattened Device Tree)")
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.smp = smp_ops(r8a7791_smp_ops),
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.init_early = r8a7791_init_early,
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.init_early = shmobile_init_delay,
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.init_time = rcar_gen2_timer_init,
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.dt_compat = r8a7791_boards_compat_dt,
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MACHINE_END
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@ -23,6 +23,23 @@
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#include <linux/delay.h>
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#include <linux/of_address.h>
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void __init shmobile_setup_delay_hz(unsigned int max_cpu_core_hz,
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unsigned int mult, unsigned int div)
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{
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/* calculate a worst-case loops-per-jiffy value
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* based on maximum cpu core hz setting and the
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* __delay() implementation in arch/arm/lib/delay.S
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*
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* this will result in a longer delay than expected
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* when the cpu core runs on lower frequencies.
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*/
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unsigned int value = HZ * div / mult;
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if (!preset_lpj)
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preset_lpj = max_cpu_core_hz / value;
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}
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void __init shmobile_setup_delay(unsigned int max_cpu_core_mhz,
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unsigned int mult, unsigned int div)
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{
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@ -58,12 +75,12 @@ void __init shmobile_init_delay(void)
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if (max_freq) {
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if (of_find_compatible_node(NULL, NULL, "arm,cortex-a8"))
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shmobile_setup_delay(max_freq, 1, 3);
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shmobile_setup_delay_hz(max_freq, 1, 3);
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else if (of_find_compatible_node(NULL, NULL, "arm,cortex-a9"))
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shmobile_setup_delay(max_freq, 1, 3);
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shmobile_setup_delay_hz(max_freq, 1, 3);
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else if (of_find_compatible_node(NULL, NULL, "arm,cortex-a15"))
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if (!IS_ENABLED(CONFIG_ARM_ARCH_TIMER))
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shmobile_setup_delay(max_freq, 2, 4);
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shmobile_setup_delay_hz(max_freq, 2, 4);
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}
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}
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