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ASoC: dt-bindings: renesas,rz-ssi: Update slave dma channel configuration parameter
The DMAC on RZ/G2L has specific slave channel configuration parameters for SSI. This patch updates the dmas description and example node to include the encoded slave channel configuration. Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Link: https://lore.kernel.org/r/20210813091156.10700-3-biju.das.jz@bp.renesas.com Signed-off-by: Mark Brown <broonie@kernel.org>
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@ -48,6 +48,24 @@ properties:
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dmas:
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minItems: 1
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maxItems: 2
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description:
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The first cell represents a phandle to dmac
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The second cell specifies the encoded MID/RID values of the SSI port
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connected to the DMA client and the slave channel configuration
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parameters.
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bits[0:9] - Specifies MID/RID value of a SSI channel as below
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MID/RID value of SSI rx0 = 0x256
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MID/RID value of SSI tx0 = 0x255
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MID/RID value of SSI rx1 = 0x25a
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MID/RID value of SSI tx1 = 0x259
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MID/RID value of SSI rt2 = 0x25f
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MID/RID value of SSI rx3 = 0x262
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MID/RID value of SSI tx3 = 0x261
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bit[10] - HIEN = 1, Detects a request in response to the rising edge
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of the signal
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bit[11] - LVL = 0, Detects based on the edge
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bits[12:14] - AM = 2, Bus cycle mode
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bit[15] - TM = 0, Single transfer mode
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dma-names:
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oneOf:
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@ -93,8 +111,8 @@ examples:
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clock-names = "ssi", "ssi_sfr", "audio_clk1", "audio_clk2";
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power-domains = <&cpg>;
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resets = <&cpg R9A07G044_SSI0_RST_M2_REG>;
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dmas = <&dmac 0x255>,
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<&dmac 0x256>;
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dmas = <&dmac 0x2655>,
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<&dmac 0x2656>;
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dma-names = "tx", "rx";
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#sound-dai-cells = <0>;
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};
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