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drm/amdgpu: Fix overflow of watermark calcs at > 4k resolutions.
Commitd63c277dc6
("drm/amdgpu: Make display watermark calculations more accurate") made watermark calculations more accurate, but not for > 4k resolutions on 32-Bit architectures, as it introduced an integer overflow for those setups and resolutions. Fix this by proper u64 casting and division. Signed-off-by: Mario Kleiner <mario.kleiner.de@gmail.com> Reported-by: Ben Hutchings <ben.hutchings@codethink.co.uk> Fixes:d63c277dc6
("drm/amdgpu: Make display watermark calculations more accurate") Cc: Ben Hutchings <ben.hutchings@codethink.co.uk> Cc: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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@ -1207,8 +1207,11 @@ static void dce_v10_0_program_watermarks(struct amdgpu_device *adev,
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u32 tmp, wm_mask, lb_vblank_lead_lines = 0;
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if (amdgpu_crtc->base.enabled && num_heads && mode) {
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active_time = 1000000UL * (u32)mode->crtc_hdisplay / (u32)mode->clock;
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line_time = min((u32) (1000000UL * (u32)mode->crtc_htotal / (u32)mode->clock), (u32)65535);
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active_time = (u32) div_u64((u64)mode->crtc_hdisplay * 1000000,
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(u32)mode->clock);
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line_time = (u32) div_u64((u64)mode->crtc_htotal * 1000000,
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(u32)mode->clock);
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line_time = min(line_time, (u32)65535);
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/* watermark for high clocks */
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if (adev->pm.dpm_enabled) {
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@ -1176,8 +1176,11 @@ static void dce_v11_0_program_watermarks(struct amdgpu_device *adev,
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u32 tmp, wm_mask, lb_vblank_lead_lines = 0;
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if (amdgpu_crtc->base.enabled && num_heads && mode) {
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active_time = 1000000UL * (u32)mode->crtc_hdisplay / (u32)mode->clock;
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line_time = min((u32) (1000000UL * (u32)mode->crtc_htotal / (u32)mode->clock), (u32)65535);
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active_time = (u32) div_u64((u64)mode->crtc_hdisplay * 1000000,
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(u32)mode->clock);
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line_time = (u32) div_u64((u64)mode->crtc_htotal * 1000000,
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(u32)mode->clock);
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line_time = min(line_time, (u32)65535);
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/* watermark for high clocks */
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if (adev->pm.dpm_enabled) {
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@ -983,8 +983,11 @@ static void dce_v6_0_program_watermarks(struct amdgpu_device *adev,
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fixed20_12 a, b, c;
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if (amdgpu_crtc->base.enabled && num_heads && mode) {
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active_time = 1000000UL * (u32)mode->crtc_hdisplay / (u32)mode->clock;
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line_time = min((u32) (1000000UL * (u32)mode->crtc_htotal / (u32)mode->clock), (u32)65535);
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active_time = (u32) div_u64((u64)mode->crtc_hdisplay * 1000000,
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(u32)mode->clock);
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line_time = (u32) div_u64((u64)mode->crtc_htotal * 1000000,
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(u32)mode->clock);
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line_time = min(line_time, (u32)65535);
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priority_a_cnt = 0;
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priority_b_cnt = 0;
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@ -1091,8 +1091,11 @@ static void dce_v8_0_program_watermarks(struct amdgpu_device *adev,
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u32 tmp, wm_mask, lb_vblank_lead_lines = 0;
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if (amdgpu_crtc->base.enabled && num_heads && mode) {
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active_time = 1000000UL * (u32)mode->crtc_hdisplay / (u32)mode->clock;
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line_time = min((u32) (1000000UL * (u32)mode->crtc_htotal / (u32)mode->clock), (u32)65535);
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active_time = (u32) div_u64((u64)mode->crtc_hdisplay * 1000000,
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(u32)mode->clock);
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line_time = (u32) div_u64((u64)mode->crtc_htotal * 1000000,
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(u32)mode->clock);
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line_time = min(line_time, (u32)65535);
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/* watermark for high clocks */
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if (adev->pm.dpm_enabled) {
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