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drm/meson: overlay: setup overlay for Amlogic FBC Scatter Memory layout

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Setup the Amlogic FBC decoder for the VD1 video overlay plane to use
read the FBC header as Scatter Memory layout reference.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Tested-by: Kevin Hilman <khilman@baylibre.com>
Reviewed-by: Kevin Hilman <khilman@baylibre.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20200703080728.25207-6-narmstrong@baylibre.com
This commit is contained in:
Neil Armstrong 2020-07-03 10:07:27 +02:00
parent 376b1391d9
commit be26a04bb7
1 changed files with 32 additions and 15 deletions
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47
drivers/gpu/drm/meson/meson_overlay.c
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@ -490,6 +490,10 @@ static void meson_overlay_atomic_update(struct drm_plane *plane,
AMLOGIC_FBC_OPTION_MEM_SAVING))
priv->viu.vd1_afbc_mode |= AFBC_BLK_MEM_MODE;
if ((fb->modifier & __fourcc_mod_amlogic_layout_mask) ==
AMLOGIC_FBC_LAYOUT_SCATTER)
priv->viu.vd1_afbc_mode |= AFBC_SCATTER_MODE;
priv->viu.vd1_afbc_en = 0x1600 | AFBC_DEC_ENABLE;
priv->viu.vd1_afbc_conv_ctrl = AFBC_CONV_LBUF_LEN(256);
@ -675,23 +679,32 @@ static void meson_overlay_atomic_update(struct drm_plane *plane,
}
if (priv->viu.vd1_afbc) {
/* Default mode is 4k per superblock */
unsigned long block_size = 4096;
unsigned long body_size;
if (priv->viu.vd1_afbc_mode & AFBC_SCATTER_MODE) {
/*
* In Scatter mode, the header contains the physical
* body content layout, thus the body content
* size isn't needed.
*/
priv->viu.vd1_afbc_head_addr = priv->viu.vd1_addr0 >> 4;
priv->viu.vd1_afbc_body_addr = 0;
} else {
/* Default mode is 4k per superblock */
unsigned long block_size = 4096;
unsigned long body_size;
/* 8bit mem saving mode is 3072bytes per superblock */
if (priv->viu.vd1_afbc_mode & AFBC_BLK_MEM_MODE)
block_size = 3072;
/* 8bit mem saving mode is 3072bytes per superblock */
if (priv->viu.vd1_afbc_mode & AFBC_BLK_MEM_MODE)
block_size = 3072;
body_size = (ALIGN(priv->viu.vd1_stride0, 64) / 64) *
(ALIGN(priv->viu.vd1_height0, 32) / 32) *
block_size;
body_size = (ALIGN(priv->viu.vd1_stride0, 64) / 64) *
(ALIGN(priv->viu.vd1_height0, 32) / 32) *
block_size;
priv->viu.vd1_afbc_body_addr = priv->viu.vd1_addr0 >> 4;
/* Header is after body content */
priv->viu.vd1_afbc_head_addr = (priv->viu.vd1_addr0 +
body_size) >> 4;
priv->viu.vd1_afbc_body_addr = priv->viu.vd1_addr0 >> 4;
/* Header is after body content */
priv->viu.vd1_afbc_head_addr = (priv->viu.vd1_addr0 +
body_size) >> 4;
}
}
priv->viu.vd1_enabled = true;
@ -754,7 +767,8 @@ static bool meson_overlay_format_mod_supported(struct drm_plane *plane,
return false;
}
if (layout != AMLOGIC_FBC_LAYOUT_BASIC) {
if (layout != AMLOGIC_FBC_LAYOUT_BASIC &&
layout != AMLOGIC_FBC_LAYOUT_SCATTER) {
DRM_DEBUG_KMS("%llx invalid layout %x\n",
modifier, layout);
return false;
@ -800,8 +814,11 @@ static const uint32_t supported_drm_formats[] = {
};
static const uint64_t format_modifiers[] = {
DRM_FORMAT_MOD_AMLOGIC_FBC(AMLOGIC_FBC_LAYOUT_SCATTER,
AMLOGIC_FBC_OPTION_MEM_SAVING),
DRM_FORMAT_MOD_AMLOGIC_FBC(AMLOGIC_FBC_LAYOUT_BASIC,
AMLOGIC_FBC_OPTION_MEM_SAVING),
DRM_FORMAT_MOD_AMLOGIC_FBC(AMLOGIC_FBC_LAYOUT_SCATTER, 0),
DRM_FORMAT_MOD_AMLOGIC_FBC(AMLOGIC_FBC_LAYOUT_BASIC, 0),
DRM_FORMAT_MOD_LINEAR,
DRM_FORMAT_MOD_INVALID,