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ARM: shmobile: r8a7794: Add SYS-DMAC clocks to device tree
Signed-off-by: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com> [horms: resolved conflicts] Signed-off-by: Simon Horman <horms+renesas@verge.net.au> Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
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@ -479,16 +479,19 @@
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compatible = "renesas,r8a7794-mstp-clocks", "renesas,cpg-mstp-clocks";
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compatible = "renesas,r8a7794-mstp-clocks", "renesas,cpg-mstp-clocks";
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reg = <0 0xe6150138 0 4>, <0 0xe6150040 0 4>;
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reg = <0 0xe6150138 0 4>, <0 0xe6150040 0 4>;
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clocks = <&mp_clk>, <&mp_clk>, <&mp_clk>, <&mp_clk>, <&mp_clk>,
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clocks = <&mp_clk>, <&mp_clk>, <&mp_clk>, <&mp_clk>, <&mp_clk>,
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<&mp_clk>, <&mp_clk>, <&mp_clk>;
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<&mp_clk>, <&mp_clk>, <&mp_clk>,
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<&zs_clk>, <&zs_clk>;
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#clock-cells = <1>;
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#clock-cells = <1>;
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clock-indices = <
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clock-indices = <
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R8A7794_CLK_SCIFA2 R8A7794_CLK_SCIFA1 R8A7794_CLK_SCIFA0
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R8A7794_CLK_SCIFA2 R8A7794_CLK_SCIFA1 R8A7794_CLK_SCIFA0
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R8A7794_CLK_MSIOF2 R8A7794_CLK_SCIFB0 R8A7794_CLK_SCIFB1
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R8A7794_CLK_MSIOF2 R8A7794_CLK_SCIFB0 R8A7794_CLK_SCIFB1
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R8A7794_CLK_MSIOF1 R8A7794_CLK_SCIFB2
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R8A7794_CLK_MSIOF1 R8A7794_CLK_SCIFB2
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R8A7794_CLK_SYS_DMAC1 R8A7794_CLK_SYS_DMAC0
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>;
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>;
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clock-output-names =
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clock-output-names =
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"scifa2", "scifa1", "scifa0", "msiof2", "scifb0",
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"scifa2", "scifa1", "scifa0", "msiof2", "scifb0",
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"scifb1", "msiof1", "scifb2";
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"scifb1", "msiof1", "scifb2",
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"sys-dmac1", "sys-dmac0";
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};
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};
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mstp3_clks: mstp3_clks@e615013c {
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mstp3_clks: mstp3_clks@e615013c {
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compatible = "renesas,r8a7794-mstp-clocks", "renesas,cpg-mstp-clocks";
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compatible = "renesas,r8a7794-mstp-clocks", "renesas,cpg-mstp-clocks";
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@ -48,6 +48,8 @@
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#define R8A7794_CLK_SCIFB1 7
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#define R8A7794_CLK_SCIFB1 7
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#define R8A7794_CLK_MSIOF1 8
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#define R8A7794_CLK_MSIOF1 8
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#define R8A7794_CLK_SCIFB2 16
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#define R8A7794_CLK_SCIFB2 16
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#define R8A7794_CLK_SYS_DMAC1 18
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#define R8A7794_CLK_SYS_DMAC0 19
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/* MSTP3 */
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/* MSTP3 */
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#define R8A7794_CLK_CMT1 29
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#define R8A7794_CLK_CMT1 29
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