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ASoC: tas2770: Refactor sample rate function
Refactor the tas2770_set_samplerate to simplify the code and access the I2C bus only once per rate request. The ramp rate and sample rate bits are contained in the same register so a single call to the snd_soc_update_bits function is all that is needed Signed-off-by: Dan Murphy <dmurphy@ti.com> Link: https://lore.kernel.org/r/20200918190548.12598-9-dmurphy@ti.com Signed-off-by: Mark Brown <broonie@kernel.org>
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@ -252,80 +252,43 @@ static int tas2770_set_bitwidth(struct tas2770_priv *tas2770, int bitwidth)
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static int tas2770_set_samplerate(struct tas2770_priv *tas2770, int samplerate)
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{
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int ret;
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struct snd_soc_component *component = tas2770->component;
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int ramp_rate_val;
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int ret;
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switch (samplerate) {
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case 48000:
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ret = snd_soc_component_update_bits(component, TAS2770_TDM_CFG_REG0,
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TAS2770_TDM_CFG_REG0_SMP_MASK,
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TAS2770_TDM_CFG_REG0_SMP_48KHZ);
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if (ret < 0)
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return ret;
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ret = snd_soc_component_update_bits(component, TAS2770_TDM_CFG_REG0,
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TAS2770_TDM_CFG_REG0_31_MASK,
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TAS2770_TDM_CFG_REG0_31_44_1_48KHZ);
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ramp_rate_val = TAS2770_TDM_CFG_REG0_SMP_48KHZ |
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TAS2770_TDM_CFG_REG0_31_44_1_48KHZ;
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break;
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case 44100:
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ret = snd_soc_component_update_bits(component, TAS2770_TDM_CFG_REG0,
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TAS2770_TDM_CFG_REG0_SMP_MASK,
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TAS2770_TDM_CFG_REG0_SMP_44_1KHZ);
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if (ret < 0)
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return ret;
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ret = snd_soc_component_update_bits(component, TAS2770_TDM_CFG_REG0,
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TAS2770_TDM_CFG_REG0_31_MASK,
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TAS2770_TDM_CFG_REG0_31_44_1_48KHZ);
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ramp_rate_val = TAS2770_TDM_CFG_REG0_SMP_44_1KHZ |
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TAS2770_TDM_CFG_REG0_31_44_1_48KHZ;
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break;
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case 96000:
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ret = snd_soc_component_update_bits(component, TAS2770_TDM_CFG_REG0,
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TAS2770_TDM_CFG_REG0_SMP_MASK,
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TAS2770_TDM_CFG_REG0_SMP_48KHZ);
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if (ret < 0)
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return ret;
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ret = snd_soc_component_update_bits(component, TAS2770_TDM_CFG_REG0,
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TAS2770_TDM_CFG_REG0_31_MASK,
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TAS2770_TDM_CFG_REG0_31_88_2_96KHZ);
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ramp_rate_val = TAS2770_TDM_CFG_REG0_SMP_48KHZ |
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TAS2770_TDM_CFG_REG0_31_88_2_96KHZ;
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break;
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case 88200:
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ret = snd_soc_component_update_bits(component, TAS2770_TDM_CFG_REG0,
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TAS2770_TDM_CFG_REG0_SMP_MASK,
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TAS2770_TDM_CFG_REG0_SMP_44_1KHZ);
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if (ret < 0)
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return ret;
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ret = snd_soc_component_update_bits(component, TAS2770_TDM_CFG_REG0,
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TAS2770_TDM_CFG_REG0_31_MASK,
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TAS2770_TDM_CFG_REG0_31_88_2_96KHZ);
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ramp_rate_val = TAS2770_TDM_CFG_REG0_SMP_44_1KHZ |
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TAS2770_TDM_CFG_REG0_31_88_2_96KHZ;
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break;
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case 19200:
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ret = snd_soc_component_update_bits(component, TAS2770_TDM_CFG_REG0,
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TAS2770_TDM_CFG_REG0_SMP_MASK,
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TAS2770_TDM_CFG_REG0_SMP_48KHZ);
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if (ret < 0)
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return ret;
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ret = snd_soc_component_update_bits(component, TAS2770_TDM_CFG_REG0,
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TAS2770_TDM_CFG_REG0_31_MASK,
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TAS2770_TDM_CFG_REG0_31_176_4_192KHZ);
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ramp_rate_val = TAS2770_TDM_CFG_REG0_SMP_48KHZ |
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TAS2770_TDM_CFG_REG0_31_176_4_192KHZ;
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break;
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case 17640:
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ret = snd_soc_component_update_bits(component, TAS2770_TDM_CFG_REG0,
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TAS2770_TDM_CFG_REG0_SMP_MASK,
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TAS2770_TDM_CFG_REG0_SMP_44_1KHZ);
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if (ret < 0)
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return ret;
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ret = snd_soc_component_update_bits(component, TAS2770_TDM_CFG_REG0,
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TAS2770_TDM_CFG_REG0_31_MASK,
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TAS2770_TDM_CFG_REG0_31_176_4_192KHZ);
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ramp_rate_val = TAS2770_TDM_CFG_REG0_SMP_44_1KHZ |
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TAS2770_TDM_CFG_REG0_31_176_4_192KHZ;
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break;
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default:
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ret = -EINVAL;
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return -EINVAL;
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}
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ret = snd_soc_component_update_bits(component, TAS2770_TDM_CFG_REG0,
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TAS2770_TDM_CFG_REG0_SMP_MASK |
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TAS2770_TDM_CFG_REG0_31_MASK,
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ramp_rate_val);
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if (ret < 0)
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return ret;
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