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cxl: Update implementation service layer
The service layer API (in cxl.h) lists some low-level functions whose implementation is different on PSL8, PSL9 and XSL: - Init implementation for the adapter and the afu. - Invalidate TLB/SLB. - Attach process for dedicated/directed models. - Handle psl interrupts. - Debug registers for the adapter and the afu. - Traces. Each environment implements its own functions, and the common code uses them through function pointers, defined in cxl_service_layer_ops. Signed-off-by: Christophe Lombard <clombard@linux.vnet.ibm.com> Reviewed-by: Andrew Donnellan <andrew.donnellan@au1.ibm.com> Acked-by: Frederic Barrat <fbarrat@linux.vnet.ibm.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
This commit is contained in:
Christophe Lombard
Michael Ellerman
parent
6dd2d23403
commit
bdd2e71506
@ -553,13 +553,23 @@ struct cxl_context {
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struct mm_struct *mm;
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};
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struct cxl_irq_info;
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struct cxl_service_layer_ops {
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int (*adapter_regs_init)(struct cxl *adapter, struct pci_dev *dev);
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int (*invalidate_all)(struct cxl *adapter);
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int (*afu_regs_init)(struct cxl_afu *afu);
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int (*sanitise_afu_regs)(struct cxl_afu *afu);
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int (*register_serr_irq)(struct cxl_afu *afu);
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void (*release_serr_irq)(struct cxl_afu *afu);
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void (*debugfs_add_adapter_sl_regs)(struct cxl *adapter, struct dentry *dir);
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void (*debugfs_add_afu_sl_regs)(struct cxl_afu *afu, struct dentry *dir);
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irqreturn_t (*handle_interrupt)(int irq, struct cxl_context *ctx, struct cxl_irq_info *irq_info);
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irqreturn_t (*fail_irq)(struct cxl_afu *afu, struct cxl_irq_info *irq_info);
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int (*activate_dedicated_process)(struct cxl_afu *afu);
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int (*attach_afu_directed)(struct cxl_context *ctx, u64 wed, u64 amr);
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int (*attach_dedicated_process)(struct cxl_context *ctx, u64 wed, u64 amr);
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void (*update_dedicated_ivtes)(struct cxl_context *ctx);
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void (*debugfs_add_adapter_regs)(struct cxl *adapter, struct dentry *dir);
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void (*debugfs_add_afu_regs)(struct cxl_afu *afu, struct dentry *dir);
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void (*psl_irq_dump_registers)(struct cxl_context *ctx);
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void (*err_irq_dump_registers)(struct cxl *adapter);
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void (*debugfs_stop_trace)(struct cxl *adapter);
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@ -803,6 +813,11 @@ int afu_register_irqs(struct cxl_context *ctx, u32 count);
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void afu_release_irqs(struct cxl_context *ctx, void *cookie);
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void afu_irq_name_free(struct cxl_context *ctx);
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int cxl_attach_afu_directed_psl(struct cxl_context *ctx, u64 wed, u64 amr);
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int cxl_activate_dedicated_process_psl(struct cxl_afu *afu);
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int cxl_attach_dedicated_process_psl(struct cxl_context *ctx, u64 wed, u64 amr);
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void cxl_update_dedicated_ivtes_psl(struct cxl_context *ctx);
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#ifdef CONFIG_DEBUG_FS
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int cxl_debugfs_init(void);
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@ -811,10 +826,10 @@ int cxl_debugfs_adapter_add(struct cxl *adapter);
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void cxl_debugfs_adapter_remove(struct cxl *adapter);
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int cxl_debugfs_afu_add(struct cxl_afu *afu);
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void cxl_debugfs_afu_remove(struct cxl_afu *afu);
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void cxl_stop_trace(struct cxl *cxl);
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void cxl_debugfs_add_adapter_psl_regs(struct cxl *adapter, struct dentry *dir);
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void cxl_debugfs_add_adapter_xsl_regs(struct cxl *adapter, struct dentry *dir);
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void cxl_debugfs_add_afu_psl_regs(struct cxl_afu *afu, struct dentry *dir);
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void cxl_stop_trace_psl(struct cxl *cxl);
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void cxl_debugfs_add_adapter_regs_psl(struct cxl *adapter, struct dentry *dir);
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void cxl_debugfs_add_adapter_regs_xsl(struct cxl *adapter, struct dentry *dir);
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void cxl_debugfs_add_afu_regs_psl(struct cxl_afu *afu, struct dentry *dir);
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#else /* CONFIG_DEBUG_FS */
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@ -849,17 +864,17 @@ static inline void cxl_stop_trace(struct cxl *cxl)
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{
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}
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static inline void cxl_debugfs_add_adapter_psl_regs(struct cxl *adapter,
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static inline void cxl_debugfs_add_adapter_regs_psl(struct cxl *adapter,
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struct dentry *dir)
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{
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}
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static inline void cxl_debugfs_add_adapter_xsl_regs(struct cxl *adapter,
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static inline void cxl_debugfs_add_adapter_regs_xsl(struct cxl *adapter,
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struct dentry *dir)
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{
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}
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static inline void cxl_debugfs_add_afu_psl_regs(struct cxl_afu *afu, struct dentry *dir)
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static inline void cxl_debugfs_add_afu_regs_psl(struct cxl_afu *afu, struct dentry *dir)
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{
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}
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@ -904,19 +919,20 @@ struct cxl_irq_info {
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};
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void cxl_assign_psn_space(struct cxl_context *ctx);
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irqreturn_t cxl_irq(int irq, struct cxl_context *ctx, struct cxl_irq_info *irq_info);
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int cxl_invalidate_all_psl(struct cxl *adapter);
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irqreturn_t cxl_irq_psl(int irq, struct cxl_context *ctx, struct cxl_irq_info *irq_info);
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irqreturn_t cxl_fail_irq_psl(struct cxl_afu *afu, struct cxl_irq_info *irq_info);
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int cxl_register_one_irq(struct cxl *adapter, irq_handler_t handler,
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void *cookie, irq_hw_number_t *dest_hwirq,
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unsigned int *dest_virq, const char *name);
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int cxl_check_error(struct cxl_afu *afu);
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int cxl_afu_slbia(struct cxl_afu *afu);
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int cxl_tlb_slb_invalidate(struct cxl *adapter);
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int cxl_data_cache_flush(struct cxl *adapter);
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int cxl_afu_disable(struct cxl_afu *afu);
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int cxl_psl_purge(struct cxl_afu *afu);
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void cxl_native_psl_irq_dump_regs(struct cxl_context *ctx);
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void cxl_native_irq_dump_regs_psl(struct cxl_context *ctx);
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void cxl_native_err_irq_dump_regs(struct cxl *adapter);
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int cxl_pci_vphb_add(struct cxl_afu *afu);
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void cxl_pci_vphb_remove(struct cxl_afu *afu);
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@ -15,7 +15,7 @@
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static struct dentry *cxl_debugfs;
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void cxl_stop_trace(struct cxl *adapter)
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void cxl_stop_trace_psl(struct cxl *adapter)
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{
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int slice;
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@ -53,7 +53,7 @@ static struct dentry *debugfs_create_io_x64(const char *name, umode_t mode,
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(void __force *)value, &fops_io_x64);
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}
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void cxl_debugfs_add_adapter_psl_regs(struct cxl *adapter, struct dentry *dir)
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void cxl_debugfs_add_adapter_regs_psl(struct cxl *adapter, struct dentry *dir)
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{
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debugfs_create_io_x64("fir1", S_IRUSR, dir, _cxl_p1_addr(adapter, CXL_PSL_FIR1));
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debugfs_create_io_x64("fir2", S_IRUSR, dir, _cxl_p1_addr(adapter, CXL_PSL_FIR2));
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@ -61,7 +61,7 @@ void cxl_debugfs_add_adapter_psl_regs(struct cxl *adapter, struct dentry *dir)
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debugfs_create_io_x64("trace", S_IRUSR | S_IWUSR, dir, _cxl_p1_addr(adapter, CXL_PSL_TRACE));
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}
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void cxl_debugfs_add_adapter_xsl_regs(struct cxl *adapter, struct dentry *dir)
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void cxl_debugfs_add_adapter_regs_xsl(struct cxl *adapter, struct dentry *dir)
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{
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debugfs_create_io_x64("fec", S_IRUSR, dir, _cxl_p1_addr(adapter, CXL_XSL_FEC));
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}
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@ -82,8 +82,8 @@ int cxl_debugfs_adapter_add(struct cxl *adapter)
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debugfs_create_io_x64("err_ivte", S_IRUSR, dir, _cxl_p1_addr(adapter, CXL_PSL_ErrIVTE));
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if (adapter->native->sl_ops->debugfs_add_adapter_sl_regs)
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adapter->native->sl_ops->debugfs_add_adapter_sl_regs(adapter, dir);
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if (adapter->native->sl_ops->debugfs_add_adapter_regs)
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adapter->native->sl_ops->debugfs_add_adapter_regs(adapter, dir);
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return 0;
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}
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@ -92,7 +92,7 @@ void cxl_debugfs_adapter_remove(struct cxl *adapter)
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debugfs_remove_recursive(adapter->debugfs);
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}
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void cxl_debugfs_add_afu_psl_regs(struct cxl_afu *afu, struct dentry *dir)
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void cxl_debugfs_add_afu_regs_psl(struct cxl_afu *afu, struct dentry *dir)
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{
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debugfs_create_io_x64("fir", S_IRUSR, dir, _cxl_p1n_addr(afu, CXL_PSL_FIR_SLICE_An));
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debugfs_create_io_x64("serr", S_IRUSR, dir, _cxl_p1n_addr(afu, CXL_PSL_SERR_An));
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@ -121,8 +121,8 @@ int cxl_debugfs_afu_add(struct cxl_afu *afu)
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debugfs_create_io_x64("sstp1", S_IRUSR, dir, _cxl_p2n_addr(afu, CXL_SSTP1_An));
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debugfs_create_io_x64("err_status", S_IRUSR, dir, _cxl_p2n_addr(afu, CXL_PSL_ErrStat_An));
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if (afu->adapter->native->sl_ops->debugfs_add_afu_sl_regs)
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afu->adapter->native->sl_ops->debugfs_add_afu_sl_regs(afu, dir);
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if (afu->adapter->native->sl_ops->debugfs_add_afu_regs)
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afu->adapter->native->sl_ops->debugfs_add_afu_regs(afu, dir);
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return 0;
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}
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@ -169,7 +169,7 @@ static irqreturn_t guest_psl_irq(int irq, void *data)
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return IRQ_HANDLED;
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}
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rc = cxl_irq(irq, ctx, &irq_info);
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rc = cxl_irq_psl(irq, ctx, &irq_info);
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return rc;
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}
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@ -34,7 +34,7 @@ static irqreturn_t schedule_cxl_fault(struct cxl_context *ctx, u64 dsisr, u64 da
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return IRQ_HANDLED;
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}
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irqreturn_t cxl_irq(int irq, struct cxl_context *ctx, struct cxl_irq_info *irq_info)
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irqreturn_t cxl_irq_psl(int irq, struct cxl_context *ctx, struct cxl_irq_info *irq_info)
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{
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u64 dsisr, dar;
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@ -258,7 +258,7 @@ void cxl_release_spa(struct cxl_afu *afu)
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}
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}
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int cxl_tlb_slb_invalidate(struct cxl *adapter)
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int cxl_invalidate_all_psl(struct cxl *adapter)
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{
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unsigned long timeout = jiffies + (HZ * CXL_TIMEOUT);
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@ -578,7 +578,7 @@ static void update_ivtes_directed(struct cxl_context *ctx)
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WARN_ON(add_process_element(ctx));
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}
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static int attach_afu_directed(struct cxl_context *ctx, u64 wed, u64 amr)
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int cxl_attach_afu_directed_psl(struct cxl_context *ctx, u64 wed, u64 amr)
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{
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u32 pid;
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int result;
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@ -671,7 +671,7 @@ static int deactivate_afu_directed(struct cxl_afu *afu)
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return 0;
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}
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static int activate_dedicated_process(struct cxl_afu *afu)
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int cxl_activate_dedicated_process_psl(struct cxl_afu *afu)
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{
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dev_info(&afu->dev, "Activating dedicated process mode\n");
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@ -694,7 +694,7 @@ static int activate_dedicated_process(struct cxl_afu *afu)
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return cxl_chardev_d_afu_add(afu);
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}
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static void update_ivtes_dedicated(struct cxl_context *ctx)
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void cxl_update_dedicated_ivtes_psl(struct cxl_context *ctx)
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{
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struct cxl_afu *afu = ctx->afu;
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@ -710,7 +710,7 @@ static void update_ivtes_dedicated(struct cxl_context *ctx)
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((u64)ctx->irqs.range[3] & 0xffff));
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}
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static int attach_dedicated(struct cxl_context *ctx, u64 wed, u64 amr)
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int cxl_attach_dedicated_process_psl(struct cxl_context *ctx, u64 wed, u64 amr)
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{
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struct cxl_afu *afu = ctx->afu;
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u64 pid;
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@ -728,7 +728,8 @@ static int attach_dedicated(struct cxl_context *ctx, u64 wed, u64 amr)
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cxl_prefault(ctx, wed);
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update_ivtes_dedicated(ctx);
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if (ctx->afu->adapter->native->sl_ops->update_dedicated_ivtes)
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afu->adapter->native->sl_ops->update_dedicated_ivtes(ctx);
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cxl_p2n_write(afu, CXL_PSL_AMR_An, amr);
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@ -778,8 +779,9 @@ static int native_afu_activate_mode(struct cxl_afu *afu, int mode)
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if (mode == CXL_MODE_DIRECTED)
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return activate_afu_directed(afu);
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if (mode == CXL_MODE_DEDICATED)
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return activate_dedicated_process(afu);
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if ((mode == CXL_MODE_DEDICATED) &&
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(afu->adapter->native->sl_ops->activate_dedicated_process))
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return afu->adapter->native->sl_ops->activate_dedicated_process(afu);
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return -EINVAL;
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}
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@ -793,11 +795,13 @@ static int native_attach_process(struct cxl_context *ctx, bool kernel,
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}
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ctx->kernel = kernel;
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if (ctx->afu->current_mode == CXL_MODE_DIRECTED)
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return attach_afu_directed(ctx, wed, amr);
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if ((ctx->afu->current_mode == CXL_MODE_DIRECTED) &&
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(ctx->afu->adapter->native->sl_ops->attach_afu_directed))
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return ctx->afu->adapter->native->sl_ops->attach_afu_directed(ctx, wed, amr);
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if (ctx->afu->current_mode == CXL_MODE_DEDICATED)
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return attach_dedicated(ctx, wed, amr);
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if ((ctx->afu->current_mode == CXL_MODE_DEDICATED) &&
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(ctx->afu->adapter->native->sl_ops->attach_dedicated_process))
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return ctx->afu->adapter->native->sl_ops->attach_dedicated_process(ctx, wed, amr);
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return -EINVAL;
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}
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@ -830,8 +834,9 @@ static void native_update_ivtes(struct cxl_context *ctx)
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{
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if (ctx->afu->current_mode == CXL_MODE_DIRECTED)
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return update_ivtes_directed(ctx);
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if (ctx->afu->current_mode == CXL_MODE_DEDICATED)
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return update_ivtes_dedicated(ctx);
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if ((ctx->afu->current_mode == CXL_MODE_DEDICATED) &&
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(ctx->afu->adapter->native->sl_ops->update_dedicated_ivtes))
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return ctx->afu->adapter->native->sl_ops->update_dedicated_ivtes(ctx);
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WARN(1, "native_update_ivtes: Bad mode\n");
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}
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@ -875,7 +880,7 @@ static int native_get_irq_info(struct cxl_afu *afu, struct cxl_irq_info *info)
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return 0;
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}
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void cxl_native_psl_irq_dump_regs(struct cxl_context *ctx)
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void cxl_native_irq_dump_regs_psl(struct cxl_context *ctx)
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{
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u64 fir1, fir2, fir_slice, serr, afu_debug;
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@ -911,7 +916,7 @@ static irqreturn_t native_handle_psl_slice_error(struct cxl_context *ctx,
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return cxl_ops->ack_irq(ctx, 0, errstat);
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}
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static irqreturn_t fail_psl_irq(struct cxl_afu *afu, struct cxl_irq_info *irq_info)
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irqreturn_t cxl_fail_irq_psl(struct cxl_afu *afu, struct cxl_irq_info *irq_info)
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{
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if (irq_info->dsisr & CXL_PSL_DSISR_TRANS)
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cxl_p2n_write(afu, CXL_PSL_TFC_An, CXL_PSL_TFC_An_AE);
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@ -927,7 +932,7 @@ static irqreturn_t native_irq_multiplexed(int irq, void *data)
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struct cxl_context *ctx;
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struct cxl_irq_info irq_info;
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u64 phreg = cxl_p2n_read(afu, CXL_PSL_PEHandle_An);
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int ph, ret;
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int ph, ret = IRQ_HANDLED, res;
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/* check if eeh kicked in while the interrupt was in flight */
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if (unlikely(phreg == ~0ULL)) {
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@ -938,15 +943,18 @@ static irqreturn_t native_irq_multiplexed(int irq, void *data)
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}
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/* Mask the pe-handle from register value */
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ph = phreg & 0xffff;
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if ((ret = native_get_irq_info(afu, &irq_info))) {
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WARN(1, "Unable to get CXL IRQ Info: %i\n", ret);
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return fail_psl_irq(afu, &irq_info);
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if ((res = native_get_irq_info(afu, &irq_info))) {
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WARN(1, "Unable to get CXL IRQ Info: %i\n", res);
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if (afu->adapter->native->sl_ops->fail_irq)
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return afu->adapter->native->sl_ops->fail_irq(afu, &irq_info);
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return ret;
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}
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rcu_read_lock();
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ctx = idr_find(&afu->contexts_idr, ph);
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if (ctx) {
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ret = cxl_irq(irq, ctx, &irq_info);
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if (afu->adapter->native->sl_ops->handle_interrupt)
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ret = afu->adapter->native->sl_ops->handle_interrupt(irq, ctx, &irq_info);
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rcu_read_unlock();
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return ret;
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}
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@ -956,7 +964,9 @@ static irqreturn_t native_irq_multiplexed(int irq, void *data)
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" %016llx\n(Possible AFU HW issue - was a term/remove acked"
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" with outstanding transactions?)\n", ph, irq_info.dsisr,
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irq_info.dar);
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return fail_psl_irq(afu, &irq_info);
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if (afu->adapter->native->sl_ops->fail_irq)
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ret = afu->adapter->native->sl_ops->fail_irq(afu, &irq_info);
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return ret;
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}
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static void native_irq_wait(struct cxl_context *ctx)
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@ -377,7 +377,7 @@ static int calc_capp_routing(struct pci_dev *dev, u64 *chipid, u64 *capp_unit_id
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int init_implementation_adapter_psl_regs(struct cxl *adapter, struct pci_dev *dev)
|
||||
static int init_implementation_adapter_regs_psl(struct cxl *adapter, struct pci_dev *dev)
|
||||
{
|
||||
u64 psl_dsnctl, psl_fircntl;
|
||||
u64 chipid;
|
||||
@ -409,7 +409,7 @@ static int init_implementation_adapter_psl_regs(struct cxl *adapter, struct pci_
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int init_implementation_adapter_xsl_regs(struct cxl *adapter, struct pci_dev *dev)
|
||||
static int init_implementation_adapter_regs_xsl(struct cxl *adapter, struct pci_dev *dev)
|
||||
{
|
||||
u64 xsl_dsnctl;
|
||||
u64 chipid;
|
||||
@ -513,7 +513,7 @@ static void cxl_setup_psl_timebase(struct cxl *adapter, struct pci_dev *dev)
|
||||
return;
|
||||
}
|
||||
|
||||
static int init_implementation_afu_psl_regs(struct cxl_afu *afu)
|
||||
static int init_implementation_afu_regs_psl(struct cxl_afu *afu)
|
||||
{
|
||||
/* read/write masks for this slice */
|
||||
cxl_p1n_write(afu, CXL_PSL_APCALLOC_A, 0xFFFFFFFEFEFEFEFEULL);
|
||||
@ -996,7 +996,7 @@ static int cxl_afu_descriptor_looks_ok(struct cxl_afu *afu)
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int sanitise_afu_regs(struct cxl_afu *afu)
|
||||
static int sanitise_afu_regs_psl(struct cxl_afu *afu)
|
||||
{
|
||||
u64 reg;
|
||||
|
||||
@ -1102,8 +1102,11 @@ static int pci_configure_afu(struct cxl_afu *afu, struct cxl *adapter, struct pc
|
||||
if ((rc = pci_map_slice_regs(afu, adapter, dev)))
|
||||
return rc;
|
||||
|
||||
if ((rc = sanitise_afu_regs(afu)))
|
||||
goto err1;
|
||||
if (adapter->native->sl_ops->sanitise_afu_regs) {
|
||||
rc = adapter->native->sl_ops->sanitise_afu_regs(afu);
|
||||
if (rc)
|
||||
goto err1;
|
||||
}
|
||||
|
||||
/* We need to reset the AFU before we can read the AFU descriptor */
|
||||
if ((rc = cxl_ops->afu_reset(afu)))
|
||||
@ -1432,9 +1435,15 @@ static void cxl_release_adapter(struct device *dev)
|
||||
|
||||
static int sanitise_adapter_regs(struct cxl *adapter)
|
||||
{
|
||||
int rc = 0;
|
||||
|
||||
/* Clear PSL tberror bit by writing 1 to it */
|
||||
cxl_p1_write(adapter, CXL_PSL_ErrIVTE, CXL_PSL_ErrIVTE_tberror);
|
||||
return cxl_tlb_slb_invalidate(adapter);
|
||||
|
||||
if (adapter->native->sl_ops->invalidate_all)
|
||||
rc = adapter->native->sl_ops->invalidate_all(adapter);
|
||||
|
||||
return rc;
|
||||
}
|
||||
|
||||
/* This should contain *only* operations that can safely be done in
|
||||
@ -1518,15 +1527,23 @@ static void cxl_deconfigure_adapter(struct cxl *adapter)
|
||||
}
|
||||
|
||||
static const struct cxl_service_layer_ops psl_ops = {
|
||||
.adapter_regs_init = init_implementation_adapter_psl_regs,
|
||||
.afu_regs_init = init_implementation_afu_psl_regs,
|
||||
.adapter_regs_init = init_implementation_adapter_regs_psl,
|
||||
.invalidate_all = cxl_invalidate_all_psl,
|
||||
.afu_regs_init = init_implementation_afu_regs_psl,
|
||||
.sanitise_afu_regs = sanitise_afu_regs_psl,
|
||||
.register_serr_irq = cxl_native_register_serr_irq,
|
||||
.release_serr_irq = cxl_native_release_serr_irq,
|
||||
.debugfs_add_adapter_sl_regs = cxl_debugfs_add_adapter_psl_regs,
|
||||
.debugfs_add_afu_sl_regs = cxl_debugfs_add_afu_psl_regs,
|
||||
.psl_irq_dump_registers = cxl_native_psl_irq_dump_regs,
|
||||
.handle_interrupt = cxl_irq_psl,
|
||||
.fail_irq = cxl_fail_irq_psl,
|
||||
.activate_dedicated_process = cxl_activate_dedicated_process_psl,
|
||||
.attach_afu_directed = cxl_attach_afu_directed_psl,
|
||||
.attach_dedicated_process = cxl_attach_dedicated_process_psl,
|
||||
.update_dedicated_ivtes = cxl_update_dedicated_ivtes_psl,
|
||||
.debugfs_add_adapter_regs = cxl_debugfs_add_adapter_regs_psl,
|
||||
.debugfs_add_afu_regs = cxl_debugfs_add_afu_regs_psl,
|
||||
.psl_irq_dump_registers = cxl_native_irq_dump_regs_psl,
|
||||
.err_irq_dump_registers = cxl_native_err_irq_dump_regs,
|
||||
.debugfs_stop_trace = cxl_stop_trace,
|
||||
.debugfs_stop_trace = cxl_stop_trace_psl,
|
||||
.write_timebase_ctrl = write_timebase_ctrl_psl,
|
||||
.timebase_read = timebase_read_psl,
|
||||
.capi_mode = OPAL_PHB_CAPI_MODE_CAPI,
|
||||
@ -1534,8 +1551,16 @@ static const struct cxl_service_layer_ops psl_ops = {
|
||||
};
|
||||
|
||||
static const struct cxl_service_layer_ops xsl_ops = {
|
||||
.adapter_regs_init = init_implementation_adapter_xsl_regs,
|
||||
.debugfs_add_adapter_sl_regs = cxl_debugfs_add_adapter_xsl_regs,
|
||||
.adapter_regs_init = init_implementation_adapter_regs_xsl,
|
||||
.invalidate_all = cxl_invalidate_all_psl,
|
||||
.sanitise_afu_regs = sanitise_afu_regs_psl,
|
||||
.handle_interrupt = cxl_irq_psl,
|
||||
.fail_irq = cxl_fail_irq_psl,
|
||||
.activate_dedicated_process = cxl_activate_dedicated_process_psl,
|
||||
.attach_afu_directed = cxl_attach_afu_directed_psl,
|
||||
.attach_dedicated_process = cxl_attach_dedicated_process_psl,
|
||||
.update_dedicated_ivtes = cxl_update_dedicated_ivtes_psl,
|
||||
.debugfs_add_adapter_regs = cxl_debugfs_add_adapter_regs_xsl,
|
||||
.write_timebase_ctrl = write_timebase_ctrl_xsl,
|
||||
.timebase_read = timebase_read_xsl,
|
||||
.capi_mode = OPAL_PHB_CAPI_MODE_DMA,
|
||||
|
||||
Loading…
Reference in New Issue
Block a user