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[ARM] 4882/2: Correction for S3C2410 clkout generation
This is a correction for 2 small bugs for the Samsung S3C2410 ARM9 SoC clocks generator Signed-off-by: Davide Rizzo <davide@elpa.it> Acked-by: Ben Dooks <ben-linux@fluff.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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@ -411,7 +411,7 @@ static int s3c24xx_clkout_setparent(struct clk *clk, struct clk *parent)
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clk->parent = parent;
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if (clk == &s3c24xx_dclk0)
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if (clk == &s3c24xx_clkout0)
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mask = S3C2410_MISCCR_CLK0_MASK;
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else {
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source <<= 4;
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@ -437,7 +437,7 @@ struct clk s3c24xx_dclk0 = {
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struct clk s3c24xx_dclk1 = {
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.name = "dclk1",
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.id = -1,
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.ctrlbit = S3C2410_DCLKCON_DCLK0EN,
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.ctrlbit = S3C2410_DCLKCON_DCLK1EN,
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.enable = s3c24xx_dclk_enable,
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.set_parent = s3c24xx_dclk_setparent,
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.set_rate = s3c24xx_set_dclk_rate,
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