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powerpc/8xx: Allow setting DATA alignment even with STRICT_KERNEL_RWX
It is now possible to not pin kernel text with a 8Mbytes TLB, so the alignment for STRICT_KERNEL_RWX can be relaxed. Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> Link: https://msgid.link/d0d8b05012b392dd166cfd911f14ba2741ce7e1e.1724173828.git.christophe.leroy@csgroup.eu
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@ -853,8 +853,8 @@ config DATA_SHIFT_BOOL
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bool "Set custom data alignment"
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depends on ADVANCED_OPTIONS
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depends on STRICT_KERNEL_RWX || DEBUG_PAGEALLOC || KFENCE
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depends on PPC_BOOK3S_32 || (PPC_8xx && !PIN_TLB_DATA && !STRICT_KERNEL_RWX) || \
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PPC_85xx
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depends on (PPC_8xx && !PIN_TLB_DATA && (!STRICT_KERNEL_RWX || !PIN_TLB_TEXT)) || \
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PPC_BOOK3S_32 || PPC_85xx
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help
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This option allows you to set the kernel data alignment. When
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RAM is mapped by blocks, the alignment needs to fit the size and
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@ -870,9 +870,9 @@ config DATA_SHIFT
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range 20 24 if (STRICT_KERNEL_RWX || DEBUG_PAGEALLOC || KFENCE) && PPC_85xx
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default 22 if STRICT_KERNEL_RWX && PPC_BOOK3S_32
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default 18 if (DEBUG_PAGEALLOC || KFENCE) && PPC_BOOK3S_32
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default 23 if STRICT_KERNEL_RWX && PPC_8xx
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default 23 if (DEBUG_PAGEALLOC || KFENCE) && PPC_8xx && PIN_TLB_DATA
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default 19 if (DEBUG_PAGEALLOC || KFENCE) && PPC_8xx
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default 23 if (STRICT_KERNEL_RWX || DEBUG_PAGEALLOC || KFENCE) && PPC_8xx && \
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(PIN_TLB_DATA || PIN_TLB_TEXT)
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default 19 if (STRICT_KERNEL_RWX || DEBUG_PAGEALLOC || KFENCE) && PPC_8xx
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default 24 if STRICT_KERNEL_RWX && PPC_85xx
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default PAGE_SHIFT
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help
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