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[SPARC64]: Kill pci_memspace_mask.
It is totally unnecessary as the needed information is properly encoded in the resources. Signed-off-by: David S. Miller <davem@davemloft.net>
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759f89e03c
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@ -29,8 +29,6 @@
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#include "pci_impl.h"
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unsigned long pci_memspace_mask = 0xffffffffUL;
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#ifndef CONFIG_PCI
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/* A "nop" PCI implementation. */
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asmlinkage int sys_pciconfig_read(unsigned long bus, unsigned long dfn,
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@ -1066,8 +1064,8 @@ static int __pci_mmap_make_offset_bus(struct pci_dev *pdev, struct vm_area_struc
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return 0;
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}
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/* Adjust vm_pgoff of VMA such that it is the physical page offset corresponding
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* to the 32-bit pci bus offset for DEV requested by the user.
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/* Adjust vm_pgoff of VMA such that it is the physical page offset
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* corresponding to the 32-bit pci bus offset for DEV requested by the user.
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*
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* Basically, the user finds the base address for his device which he wishes
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* to mmap. They read the 32-bit value from the config space base register,
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@ -1076,21 +1074,35 @@ static int __pci_mmap_make_offset_bus(struct pci_dev *pdev, struct vm_area_struc
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*
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* Returns negative error code on failure, zero on success.
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*/
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static int __pci_mmap_make_offset(struct pci_dev *dev, struct vm_area_struct *vma,
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static int __pci_mmap_make_offset(struct pci_dev *pdev,
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struct vm_area_struct *vma,
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enum pci_mmap_state mmap_state)
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{
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unsigned long user_offset = vma->vm_pgoff << PAGE_SHIFT;
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unsigned long user32 = user_offset & pci_memspace_mask;
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unsigned long largest_base, this_base, addr32;
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int i;
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unsigned long user_paddr, user_size;
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int i, err;
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if ((dev->class >> 8) == PCI_CLASS_BRIDGE_HOST)
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return __pci_mmap_make_offset_bus(dev, vma, mmap_state);
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/* First compute the physical address in vma->vm_pgoff,
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* making sure the user offset is within range in the
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* appropriate PCI space.
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*/
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err = __pci_mmap_make_offset_bus(pdev, vma, mmap_state);
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if (err)
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return err;
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/* If this is a mapping on a host bridge, any address
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* is OK.
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*/
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if ((pdev->class >> 8) == PCI_CLASS_BRIDGE_HOST)
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return err;
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/* Otherwise make sure it's in the range for one of the
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* device's resources.
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*/
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user_paddr = vma->vm_pgoff << PAGE_SHIFT;
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user_size = vma->vm_end - vma->vm_start;
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/* Figure out which base address this is for. */
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largest_base = 0UL;
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for (i = 0; i <= PCI_ROM_RESOURCE; i++) {
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struct resource *rp = &dev->resource[i];
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struct resource *rp = &pdev->resource[i];
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/* Active? */
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if (!rp->flags)
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@ -1108,26 +1120,14 @@ static int __pci_mmap_make_offset(struct pci_dev *dev, struct vm_area_struct *vm
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continue;
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}
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this_base = rp->start;
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addr32 = (this_base & PAGE_MASK) & pci_memspace_mask;
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if (mmap_state == pci_mmap_io)
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addr32 &= 0xffffff;
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if (addr32 <= user32 && this_base > largest_base)
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largest_base = this_base;
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if ((rp->start <= user_paddr) &&
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(user_paddr + user_size) <= (rp->end + 1UL))
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break;
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}
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if (largest_base == 0UL)
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if (i > PCI_ROM_RESOURCE)
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return -EINVAL;
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/* Now construct the final physical address. */
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if (mmap_state == pci_mmap_io)
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vma->vm_pgoff = (((largest_base & ~0xffffffUL) | user32) >> PAGE_SHIFT);
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else
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vma->vm_pgoff = (((largest_base & ~(pci_memspace_mask)) | user32) >> PAGE_SHIFT);
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return 0;
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}
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@ -519,13 +519,6 @@ void fire_pci_init(struct device_node *dp, const char *model_name)
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p->pbm_B.iommu = iommu;
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/* XXX MSI support XXX */
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/* Like PSYCHO and SCHIZO we have a 2GB aligned area
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* for memory space.
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*/
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pci_memspace_mask = 0x7fffffffUL;
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if (pci_fire_pbm_init(p, dp, portid))
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goto fatal_memory_error;
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@ -157,7 +157,6 @@ struct pci_controller_info {
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};
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extern struct pci_pbm_info *pci_pbm_root;
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extern unsigned long pci_memspace_mask;
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extern int pci_num_pbms;
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@ -1058,12 +1058,6 @@ void psycho_init(struct device_node *dp, char *model_name)
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p->pbm_A.config_space = p->pbm_B.config_space =
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(pr_regs[2].phys_addr + PSYCHO_CONFIGSPACE);
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/*
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* Psycho's PCI MEM space is mapped to a 2GB aligned area, so
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* we need to adjust our MEM space mask.
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*/
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pci_memspace_mask = 0x7fffffffUL;
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psycho_controller_hwinit(&p->pbm_A);
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if (psycho_iommu_init(&p->pbm_A))
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@ -1464,9 +1464,6 @@ static void __schizo_init(struct device_node *dp, char *model_name, int chip_typ
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p->pbm_B.iommu = iommu;
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/* Like PSYCHO we have a 2GB aligned area for memory space. */
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pci_memspace_mask = 0x7fffffffUL;
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if (schizo_pbm_init(p, dp, portid, chip_type))
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goto fatal_memory_error;
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@ -1055,11 +1055,6 @@ void __init sun4v_pci_init(struct device_node *dp, char *model_name)
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p->pbm_B.iommu = iommu;
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/* Like PSYCHO and SCHIZO we have a 2GB aligned area
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* for memory space.
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*/
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pci_memspace_mask = 0x7fffffffUL;
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pci_sun4v_pbm_init(p, dp, devhandle);
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return;
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