Minki/linux
1
0
Fork 1
mirror of https://github.com/torvalds/linux.git synced 2024-12-26 12:52:30 +00:00
Code Issues Packages Projects Releases Wiki Activity

ARM: i.MX27 clk: Separate DT and non-DT init procedure

Browse Source 
This patch separates DT and non-DT clock initialization procedure,
so we can avoid a lot of unneeded clk_register_clkdev() for DT case.

Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
This commit is contained in:
Alexander Shiyan 2014-06-07 20:09:25 +04:00 committed by Shawn Guo
parent d7f9891500
commit bb9c3398ef
1 changed files with 24 additions and 15 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

39
arch/arm/mach-imx/clk-imx27.c
View File

@ -89,10 +89,9 @@ enum mx27_clks {
static struct clk *clk[clk_max]; static struct clk *clk[clk_max];
static struct clk_onecell_data clk_data; static struct clk_onecell_data clk_data;
int __init mx27_clocks_init(unsigned long fref) static void __init _mx27_clocks_init(unsigned long fref)
{ {
int i; unsigned i;
struct device_node *np;
clk[dummy] = imx_clk_fixed("dummy", 0); clk[dummy] = imx_clk_fixed("dummy", 0);
clk[ckih] = imx_clk_fixed("ckih", fref); clk[ckih] = imx_clk_fixed("ckih", fref);
@ -206,12 +205,16 @@ int __init mx27_clocks_init(unsigned long fref)
pr_err("i.MX27 clk %d: register failed with %ld\n", pr_err("i.MX27 clk %d: register failed with %ld\n",
i, PTR_ERR(clk[i])); i, PTR_ERR(clk[i]));
np = of_find_compatible_node(NULL, NULL, "fsl,imx27-ccm"); clk_register_clkdev(clk[cpu_div], NULL, "cpu0");
if (np) {
clk_data.clks = clk; clk_prepare_enable(clk[emi_ahb_gate]);
clk_data.clk_num = ARRAY_SIZE(clk);
of_clk_add_provider(np, of_clk_src_onecell_get, &clk_data); imx_print_silicon_rev("i.MX27", mx27_revision());
} }
int __init mx27_clocks_init(unsigned long fref)
{
_mx27_clocks_init(fref);
clk_register_clkdev(clk[uart1_ipg_gate], "ipg", "imx21-uart.0"); clk_register_clkdev(clk[uart1_ipg_gate], "ipg", "imx21-uart.0");
clk_register_clkdev(clk[per1_gate], "per", "imx21-uart.0"); clk_register_clkdev(clk[per1_gate], "per", "imx21-uart.0");
@ -274,14 +277,9 @@ int __init mx27_clocks_init(unsigned long fref)
clk_register_clkdev(clk[emma_ipg_gate], "emma-ipg", "imx27-camera.0"); clk_register_clkdev(clk[emma_ipg_gate], "emma-ipg", "imx27-camera.0");
clk_register_clkdev(clk[emma_ahb_gate], "ahb", "m2m-emmaprp.0"); clk_register_clkdev(clk[emma_ahb_gate], "ahb", "m2m-emmaprp.0");
clk_register_clkdev(clk[emma_ipg_gate], "ipg", "m2m-emmaprp.0"); clk_register_clkdev(clk[emma_ipg_gate], "ipg", "m2m-emmaprp.0");
clk_register_clkdev(clk[cpu_div], NULL, "cpu0");
mxc_timer_init(MX27_IO_ADDRESS(MX27_GPT1_BASE_ADDR), MX27_INT_GPT1); mxc_timer_init(MX27_IO_ADDRESS(MX27_GPT1_BASE_ADDR), MX27_INT_GPT1);
clk_prepare_enable(clk[emi_ahb_gate]);
imx_print_silicon_rev("i.MX27", mx27_revision());
return 0; return 0;
} }
@ -298,5 +296,16 @@ int __init mx27_clocks_init_dt(void)
break; break;
} }
return mx27_clocks_init(fref); _mx27_clocks_init(fref);
np = of_find_compatible_node(NULL, NULL, "fsl,imx27-ccm");
BUG_ON(!np);
clk_data.clks = clk;
clk_data.clk_num = ARRAY_SIZE(clk);
of_clk_add_provider(np, of_clk_src_onecell_get, &clk_data);
mxc_timer_init_dt(of_find_compatible_node(NULL, NULL, "fsl,imx1-gpt"));
return 0;
} }