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ARM: 7087/2: mach-integrator: get timer frequency from clock
We already have a clock definition for the 24MHz clock in the Integrator, use that instead of some unclear defines from the platform.h header. Also delete the senseless comment that the file shouldn't be edited, I just edited it and the world didn't come to an end, so it's obviously false. If anyone still has the mentioned ".s file" and the s2h awk script generating that header, raise your hand (and give me your files). Acked-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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@ -126,6 +126,10 @@ static struct clk_lookup lookups[] = {
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{ /* Bus clock */
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.con_id = "apb_pclk",
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.clk = &dummy_apb_pclk,
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}, {
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/* Integrator/AP timer frequency */
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.dev_id = "ap_timer",
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.clk = &clk24mhz,
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}, { /* UART0 */
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.dev_id = "mb:16",
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.clk = &uartclk,
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@ -13,9 +13,6 @@
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*/
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/* DO NOT EDIT!! - this file automatically generated
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* from .s file by awk -f s2h.awk
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*/
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/**************************************************************************
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* * Copyright © ARM Limited 1998. All rights reserved.
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* ***********************************************************************/
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@ -399,15 +396,6 @@
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#define INTEGRATOR_TIMER1_BASE (INTEGRATOR_CT_BASE + 0x100)
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#define INTEGRATOR_TIMER2_BASE (INTEGRATOR_CT_BASE + 0x200)
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#define TICKS_PER_uSEC 24
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/*
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* These are useconds NOT ticks.
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*
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*/
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#define mSEC_1 1000
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#define mSEC_10 (mSEC_1 * 10)
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#define INTEGRATOR_CSR_BASE 0x10000000
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#define INTEGRATOR_CSR_SIZE 0x10000000
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@ -32,6 +32,7 @@
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#include <linux/interrupt.h>
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#include <linux/io.h>
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#include <linux/mtd/physmap.h>
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#include <linux/clk.h>
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#include <mach/hardware.h>
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#include <mach/platform.h>
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@ -322,13 +323,14 @@ static void __init ap_init(void)
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static unsigned long timer_reload;
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static void integrator_clocksource_init(u32 khz)
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static void integrator_clocksource_init(unsigned long inrate)
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{
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void __iomem *base = (void __iomem *)TIMER2_VA_BASE;
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u32 ctrl = TIMER_CTRL_ENABLE | TIMER_CTRL_PERIODIC;
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unsigned long rate = inrate;
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if (khz >= 1500) {
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khz /= 16;
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if (rate >= 1500000) {
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rate /= 16;
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ctrl |= TIMER_CTRL_DIV16;
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}
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@ -336,7 +338,7 @@ static void integrator_clocksource_init(u32 khz)
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writel(ctrl, base + TIMER_CTRL);
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clocksource_mmio_init(base + TIMER_VALUE, "timer2",
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khz * 1000, 200, 16, clocksource_mmio_readl_down);
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rate, 200, 16, clocksource_mmio_readl_down);
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}
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static void __iomem * const clkevt_base = (void __iomem *)TIMER1_VA_BASE;
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@ -411,24 +413,25 @@ static struct irqaction integrator_timer_irq = {
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.dev_id = &integrator_clockevent,
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};
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static void integrator_clockevent_init(u32 khz)
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static void integrator_clockevent_init(unsigned long inrate)
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{
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unsigned long rate = inrate;
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unsigned int ctrl = 0;
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/* Calculate and program a divisor */
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if (khz * 1000 > 0x100000 * HZ) {
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khz /= 256;
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if (rate > 0x100000 * HZ) {
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rate /= 256;
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ctrl |= TIMER_CTRL_DIV256;
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} else if (khz * 1000 > 0x10000 * HZ) {
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khz /= 16;
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} else if (rate > 0x10000 * HZ) {
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rate /= 16;
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ctrl |= TIMER_CTRL_DIV16;
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}
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timer_reload = khz * 1000 / HZ;
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timer_reload = rate / HZ;
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writel(ctrl, clkevt_base + TIMER_CTRL);
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setup_irq(IRQ_TIMERINT1, &integrator_timer_irq);
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clockevents_config_and_register(&integrator_clockevent,
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khz * 1000,
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rate,
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1,
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0xffffU);
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}
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@ -438,14 +441,20 @@ static void integrator_clockevent_init(u32 khz)
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*/
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static void __init ap_init_timer(void)
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{
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u32 khz = TICKS_PER_uSEC * 1000;
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struct clk *clk;
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unsigned long rate;
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clk = clk_get_sys("ap_timer", NULL);
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BUG_ON(IS_ERR(clk));
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clk_enable(clk);
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rate = clk_get_rate(clk);
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writel(0, TIMER0_VA_BASE + TIMER_CTRL);
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writel(0, TIMER1_VA_BASE + TIMER_CTRL);
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writel(0, TIMER2_VA_BASE + TIMER_CTRL);
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integrator_clocksource_init(khz);
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integrator_clockevent_init(khz);
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integrator_clocksource_init(rate);
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integrator_clockevent_init(rate);
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}
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static struct sys_timer ap_timer = {
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