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powerpc/mm/hash: Store addr_limit in PACA

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We optmize the slice page size array copy to paca by copying only the
range based on addr_limit. This will require us to not look at page size
array beyond addr_limit in PACA on slb fault. To enable that copy task
size to paca which will be used during slb fault.

Signed-off-by: Aneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com>
[mpe: Rename from task_size to addr_limit, consolidate #ifdefs]
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
This commit is contained in:
Aneesh Kumar K.V 2017-03-22 09:06:59 +05:30 committed by Michael Ellerman
parent 957b778a16
commit bb1832217a
4 changed files with 10 additions and 1 deletions
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1
arch/powerpc/include/asm/paca.h
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@ -139,6 +139,7 @@ struct paca_struct {
#ifdef CONFIG_PPC_MM_SLICES #ifdef CONFIG_PPC_MM_SLICES
u64 mm_ctx_low_slices_psize; u64 mm_ctx_low_slices_psize;
unsigned char mm_ctx_high_slices_psize[SLICE_ARRAY_SIZE]; unsigned char mm_ctx_high_slices_psize[SLICE_ARRAY_SIZE];
unsigned long addr_limit;
#else #else
u16 mm_ctx_user_psize; u16 mm_ctx_user_psize;
u16 mm_ctx_sllp; u16 mm_ctx_sllp;

1
arch/powerpc/kernel/asm-offsets.c
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@ -185,6 +185,7 @@ int main(void)
#ifdef CONFIG_PPC_MM_SLICES #ifdef CONFIG_PPC_MM_SLICES
OFFSET(PACALOWSLICESPSIZE, paca_struct, mm_ctx_low_slices_psize); OFFSET(PACALOWSLICESPSIZE, paca_struct, mm_ctx_low_slices_psize);
OFFSET(PACAHIGHSLICEPSIZE, paca_struct, mm_ctx_high_slices_psize); OFFSET(PACAHIGHSLICEPSIZE, paca_struct, mm_ctx_high_slices_psize);
DEFINE(PACA_ADDR_LIMIT, offsetof(struct paca_struct, addr_limit));
DEFINE(MMUPSIZEDEFSIZE, sizeof(struct mmu_psize_def)); DEFINE(MMUPSIZEDEFSIZE, sizeof(struct mmu_psize_def));
#endif /* CONFIG_PPC_MM_SLICES */ #endif /* CONFIG_PPC_MM_SLICES */
#endif #endif

1
arch/powerpc/kernel/paca.c
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@ -254,6 +254,7 @@ void copy_mm_to_paca(struct mm_struct *mm)
get_paca()->mm_ctx_id = context->id; get_paca()->mm_ctx_id = context->id;
#ifdef CONFIG_PPC_MM_SLICES #ifdef CONFIG_PPC_MM_SLICES
VM_BUG_ON(!mm->context.addr_limit); VM_BUG_ON(!mm->context.addr_limit);
get_paca()->addr_limit = mm->context.addr_limit;
get_paca()->mm_ctx_low_slices_psize = context->low_slices_psize; get_paca()->mm_ctx_low_slices_psize = context->low_slices_psize;
memcpy(&get_paca()->mm_ctx_high_slices_psize, memcpy(&get_paca()->mm_ctx_high_slices_psize,
&context->high_slices_psize, TASK_SLICE_ARRAY_SZ(mm)); &context->high_slices_psize, TASK_SLICE_ARRAY_SZ(mm));

8
arch/powerpc/mm/slb_low.S
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@ -149,7 +149,13 @@ END_MMU_FTR_SECTION_IFCLR(MMU_FTR_1T_SEGMENT)
* For userspace addresses, make sure this is region 0. * For userspace addresses, make sure this is region 0.
*/ */
cmpdi r9, 0 cmpdi r9, 0
bne 8f bne- 8f
/*
* user space make sure we are within the allowed limit
*/
ld r11,PACA_ADDR_LIMIT(r13)
cmpld r3,r11
bge- 8f
/* when using slices, we extract the psize off the slice bitmaps /* when using slices, we extract the psize off the slice bitmaps
* and then we need to get the sllp encoding off the mmu_psize_defs * and then we need to get the sllp encoding off the mmu_psize_defs