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drm/amdgpu: add SDMA support for Stoney (v2)
Stoney is SDMA 3.x. v2: update to latest golden register settings Signed-off-by: Samuel Li <samuel.li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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@ -55,6 +55,7 @@ MODULE_FIRMWARE("amdgpu/carrizo_sdma.bin");
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MODULE_FIRMWARE("amdgpu/carrizo_sdma1.bin");
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MODULE_FIRMWARE("amdgpu/fiji_sdma.bin");
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MODULE_FIRMWARE("amdgpu/fiji_sdma1.bin");
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MODULE_FIRMWARE("amdgpu/stoney_sdma.bin");
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static const u32 sdma_offsets[SDMA_MAX_INSTANCE] =
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{
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@ -122,6 +123,19 @@ static const u32 cz_mgcg_cgcg_init[] =
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mmSDMA1_CLK_CTRL, 0xff000ff0, 0x00000100
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};
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static const u32 stoney_golden_settings_a11[] =
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{
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mmSDMA0_GFX_IB_CNTL, 0x00000100, 0x00000100,
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mmSDMA0_POWER_CNTL, 0x00000800, 0x0003c800,
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mmSDMA0_RLC0_IB_CNTL, 0x00000100, 0x00000100,
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mmSDMA0_RLC1_IB_CNTL, 0x00000100, 0x00000100,
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};
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static const u32 stoney_mgcg_cgcg_init[] =
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{
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mmSDMA0_CLK_CTRL, 0xffffffff, 0x00000100,
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};
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/*
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* sDMA - System DMA
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* Starting with CIK, the GPU has new asynchronous
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@ -166,6 +180,14 @@ static void sdma_v3_0_init_golden_registers(struct amdgpu_device *adev)
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cz_golden_settings_a11,
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(const u32)ARRAY_SIZE(cz_golden_settings_a11));
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break;
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case CHIP_STONEY:
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amdgpu_program_register_sequence(adev,
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stoney_mgcg_cgcg_init,
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(const u32)ARRAY_SIZE(stoney_mgcg_cgcg_init));
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amdgpu_program_register_sequence(adev,
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stoney_golden_settings_a11,
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(const u32)ARRAY_SIZE(stoney_golden_settings_a11));
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break;
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default:
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break;
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}
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@ -201,6 +223,9 @@ static int sdma_v3_0_init_microcode(struct amdgpu_device *adev)
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case CHIP_CARRIZO:
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chip_name = "carrizo";
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break;
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case CHIP_STONEY:
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chip_name = "stoney";
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break;
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default: BUG();
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}
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@ -1071,6 +1096,9 @@ static int sdma_v3_0_early_init(void *handle)
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struct amdgpu_device *adev = (struct amdgpu_device *)handle;
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switch (adev->asic_type) {
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case CHIP_STONEY:
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adev->sdma.num_instances = 1;
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break;
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default:
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adev->sdma.num_instances = SDMA_MAX_INSTANCE;
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break;
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