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drm/amd/display: Fix DCN32 DSC delay calculation

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[Why]
DCN32 DSC delay calculation had an unintentional integer division,
resulting in a mismatch against the DML spreadsheet.

[How]
Cast numerator to double before performing the division.

Reviewed-by: Alvin Lee <Alvin.Lee2@amd.com>
Acked-by: Alex Hung <alex.hung@amd.com>
Signed-off-by: George Shen <george.shen@amd.com>
Tested-by: Mark Broadworth <mark.broadworth@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
George Shen 2022-10-07 12:43:26 -04:00 committed by Alex Deucher
parent 8fe8ce896c
commit bad610c97c
1 changed files with 1 additions and 1 deletions
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2
drivers/gpu/drm/amd/display/dc/dml/dcn32/display_mode_vba_util_32.c
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@ -1746,7 +1746,7 @@ unsigned int dml32_DSCDelayRequirement(bool DSCEnabled,
}
DSCDelayRequirement_val = DSCDelayRequirement_val + (HTotal - HActive) *
dml_ceil(DSCDelayRequirement_val / HActive, 1);
dml_ceil((double)DSCDelayRequirement_val / HActive, 1);
DSCDelayRequirement_val = DSCDelayRequirement_val * PixelClock / PixelClockBackEnd;